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path: root/target/arm/helper-a64.h
AgeCommit message (Expand)Author
2021-04-30target/arm: Merge mte_check1, mte_checkNRichard Henderson
2021-03-05target/arm: Speed up aarch64 TBL/TBXRichard Henderson
2020-11-15arm tcg cpus: Fix Lesser GPL version numberChetan Pant
2020-06-26target/arm: Add helper_mte_check_zvaRichard Henderson
2020-06-26target/arm: Add gen_mte_checkNRichard Henderson
2020-06-26target/arm: Add gen_mte_check1Richard Henderson
2020-06-26target/arm: Implement the LDGM, STGM, STZGM instructionsRichard Henderson
2020-06-26target/arm: Implement LDG, STG, ST2G instructionsRichard Henderson
2020-06-26target/arm: Implement the ADDG, SUBG instructionsRichard Henderson
2020-06-26target/arm: Implement the IRG instructionRichard Henderson
2020-03-05target/arm: Use DEF_HELPER_FLAGS for helper_dc_zvaRichard Henderson
2020-03-05target/arm: Move helper_dc_zva to helper-a64.cRichard Henderson
2019-03-05target/arm: Split helper_msr_i_pstate into 3Richard Henderson
2019-01-21target/arm: Add new_pc argument to helper_exception_returnRichard Henderson
2019-01-21target/arm: Move helper_exception_return to helper-a64.cRichard Henderson
2019-01-21target/arm: Add PAuth helpersRichard Henderson
2018-05-15target/arm: Implement FCMP for fp16Alex Bennée
2018-05-10target/arm: Implement CAS and CASPRichard Henderson
2018-03-01arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16Alex Bennée
2018-03-01arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16Alex Bennée
2018-03-01arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16Alex Bennée
2018-03-01arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16Alex Bennée
2018-03-01arm/translate-a64: add FP16 x2 ops for simd_indexedAlex Bennée
2018-03-01arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16Alex Bennée
2018-03-01arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16Alex Bennée
2018-03-01arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16Alex Bennée
2018-03-01arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16Alex Bennée
2018-03-01arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)Alex Bennée
2017-10-24target/arm: check CF_PARALLEL instead of parallel_cpusEmilio G. Cota
2017-01-10target-arm: Use clrsb helperRichard Henderson
2017-01-10target-arm: Use clz opcodeRichard Henderson
2016-12-20Move target-* CPU file into a target/ folderThomas Huth
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