| Age | Commit message (Expand) | Author |
|---|
| 2020-06-26 | target/arm: Add helper_mte_check_zva | Richard Henderson |
| 2020-06-26 | target/arm: Add gen_mte_checkN | Richard Henderson |
| 2020-06-26 | target/arm: Add gen_mte_check1 | Richard Henderson |
| 2020-06-26 | target/arm: Implement the LDGM, STGM, STZGM instructions | Richard Henderson |
| 2020-06-26 | target/arm: Implement LDG, STG, ST2G instructions | Richard Henderson |
| 2020-06-26 | target/arm: Implement the ADDG, SUBG instructions | Richard Henderson |
| 2020-06-26 | target/arm: Implement the IRG instruction | Richard Henderson |
| 2020-03-05 | target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva | Richard Henderson |
| 2020-03-05 | target/arm: Move helper_dc_zva to helper-a64.c | Richard Henderson |
| 2019-03-05 | target/arm: Split helper_msr_i_pstate into 3 | Richard Henderson |
| 2019-01-21 | target/arm: Add new_pc argument to helper_exception_return | Richard Henderson |
| 2019-01-21 | target/arm: Move helper_exception_return to helper-a64.c | Richard Henderson |
| 2019-01-21 | target/arm: Add PAuth helpers | Richard Henderson |
| 2018-05-15 | target/arm: Implement FCMP for fp16 | Alex Bennée |
| 2018-05-10 | target/arm: Implement CAS and CASP | Richard Henderson |
| 2018-03-01 | arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FCVTxx to simd_two_reg_misc_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FP16 FPRINTx to simd_two_reg_misc_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FP16 x2 ops for simd_indexed | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FP16 FR[ECP/SQRT]S to simd_three_reg_same_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FP16 FMULA/X/S to simd_three_reg_same_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FP16 F[A]C[EQ/GE/GT] to simd_three_reg_same_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: add FP16 FADD/FABD/FSUB/FMUL/FDIV to simd_three_reg_same_fp16 | Alex Bennée |
| 2018-03-01 | arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV) | Alex Bennée |
| 2017-10-24 | target/arm: check CF_PARALLEL instead of parallel_cpus | Emilio G. Cota |
| 2017-01-10 | target-arm: Use clrsb helper | Richard Henderson |
| 2017-01-10 | target-arm: Use clz opcode | Richard Henderson |
| 2016-12-20 | Move target-* CPU file into a target/ folder | Thomas Huth |
