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path: root/target/arm/cpu_tcg.c
AgeCommit message (Expand)Author
2021-09-14target/arm: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé
2021-09-01target/arm: Enable MVE in Cortex-M55Peter Maydell
2021-07-21target/arm: Implement debug_check_breakpointRichard Henderson
2021-06-03target/arm: Enable BFloat16 extensionsRichard Henderson
2021-05-26hw/core: Constify TCGCPUOpsRichard Henderson
2021-05-25target/arm: Enable SVE2 and related extensionsRichard Henderson
2021-04-06Revert "target/arm: Make number of counters in PMCR follow the CPU"Peter Maydell
2021-03-30target/arm: Make number of counters in PMCR follow the CPUPeter Maydell
2021-03-08target/arm: Restrict v7A TCG cpus to TCG accelPhilippe Mathieu-Daudé
2021-03-05target/arm: Restrict v8M IDAU to TCGPhilippe Mathieu-Daudé
2021-02-05cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana
2021-02-05cpu: move cc->do_interrupt to tcg_opsClaudio Fontana
2021-02-05cpu: Move cpu_exec_* to tcg_opsEduardo Habkost
2021-01-08target/arm: Implement Cortex-M55 modelPeter Maydell
2020-10-01target/arm: Add ID register values for Cortex-M0Peter Maydell
2020-10-01target/arm: Move id_pfr0, id_pfr1 into ARMISARegistersPeter Maydell
2020-05-14target/arm: Use correct GDB XML for M-profile coresPeter Maydell
2020-05-11target/arm: Restrict TCG cpus to TCG accelPhilippe Mathieu-Daudé
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