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path: root/target-xtensa/translate.c
AgeCommit message (Expand)Author
2011-09-10target-xtensa: implement relocatable vectorsMax Filippov
2011-09-10target-xtensa: implement CPENABLE and PRID SRsMax Filippov
2011-09-10target-xtensa: implement accurate window checkMax Filippov
2011-09-10target-xtensa: implement interrupt optionMax Filippov
2011-09-10target-xtensa: implement SIMCALLMax Filippov
2011-09-10target-xtensa: implement unaligned exception optionMax Filippov
2011-09-10target-xtensa: implement extended L32RMax Filippov
2011-09-10target-xtensa: implement loop optionMax Filippov
2011-09-10target-xtensa: implement windowed registersMax Filippov
2011-09-10target-xtensa: implement RST2 group (32 bit mul/div/rem)Max Filippov
2011-09-10target-xtensa: implement exceptionsMax Filippov
2011-09-10target-xtensa: add PS register and access controlMax Filippov
2011-09-10target-xtensa: implement CACHE groupMax Filippov
2011-09-10target-xtensa: implement SYNC groupMax Filippov
2011-09-10target-xtensa: mark reserved and TBD opcodesMax Filippov
2011-09-10target-xtensa: implement LSAI groupMax Filippov
2011-09-10target-xtensa: implement shifts (ST1 and RST1 groups)Max Filippov
2011-09-10target-xtensa: implement RST3 groupMax Filippov
2011-09-10target-xtensa: add special and user registersMax Filippov
2011-09-10target-xtensa: implement JX/RET0/CALLXMax Filippov
2011-09-10target-xtensa: implement conditional jumpsMax Filippov
2011-09-10target-xtensa: implement RT0 groupMax Filippov
2011-09-10target-xtensa: implement narrow instructionsMax Filippov
2011-09-10target-xtensa: implement disas_xtensa_insnMax Filippov
2011-09-10target-xtensa: add target stubsMax Filippov
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