| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-02-24 | target-xtensa: provide HW confg ID registers | Max Filippov |
| 2014-02-24 | target-xtensa: refactor standard core configuration | Max Filippov |
| 2012-12-08 | target-xtensa: implement MISC SR | Max Filippov |
| 2012-12-08 | target-xtensa: restrict available SRs by enabled options | Max Filippov |
| 2012-12-08 | target-xtensa: implement CACHEATTR SR | Max Filippov |
| 2012-12-08 | target-xtensa: implement ATOMCTL SR | Max Filippov |
| 2012-09-22 | target-xtensa: handle boolean option in overlays | Max Filippov |
| 2012-02-20 | target-xtensa: add DEBUG_SECTION to overlay tool | Max Filippov |
| 2012-02-18 | target-xtensa: define TLB_TEMPLATE for MMU-less cores | Max Filippov |
| 2011-11-26 | target-xtensa: fix MMUv3 initialization | Max Filippov |
| 2011-11-02 | target-xtensa: handle cache options in the overlay tool | Max Filippov |
| 2011-10-16 | target-xtensa: extract core configuration from overlay | Max Filippov |
 |
index : slackcoder/qemu | |
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