aboutsummaryrefslogtreecommitdiff
path: root/target-xtensa/cpu.h
AgeCommit message (Expand)Author
2011-09-10target-xtensa: implement CPENABLE and PRID SRsMax Filippov
2011-09-10target-xtensa: implement interrupt optionMax Filippov
2011-09-10target-xtensa: implement extended L32RMax Filippov
2011-09-10target-xtensa: implement loop optionMax Filippov
2011-09-10target-xtensa: implement windowed registersMax Filippov
2011-09-10target-xtensa: implement exceptionsMax Filippov
2011-09-10target-xtensa: add PS register and access controlMax Filippov
2011-09-10target-xtensa: implement LSAI groupMax Filippov
2011-09-10target-xtensa: implement shifts (ST1 and RST1 groups)Max Filippov
2011-09-10target-xtensa: add special and user registersMax Filippov
2011-09-10target-xtensa: implement disas_xtensa_insnMax Filippov
2011-09-10target-xtensa: add target stubsMax Filippov