Age | Commit message (Expand) | Author |
2014-10-20 | target-tricore: Add instructions of BO opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Add instructions of BIT opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Add instructions of B opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Add instructions of ABS, ABSB opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Cleanup and Bugfixes | Bastian Koppelmann |
2014-09-25 | target-tricore: Remove the dummy interrupt boilerplate | Richard Henderson |
2014-09-01 | target-tricore: Add instructions of SR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SLR, SSRO and SRO opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SC opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SBR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SBC and SBRN opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SB opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SRRS and SLRO opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SSR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SRR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SRC opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add masks and opcodes for decoding | Bastian Koppelmann |
2014-09-01 | target-tricore: Add initialization for translation and activate target | Bastian Koppelmann |
2014-09-01 | target-tricore: Add softmmu support | Bastian Koppelmann |
2014-09-01 | target-tricore: Add target stubs and qom-cpu | Bastian Koppelmann |