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2014-10-20target-tricore: Add instructions of BO opcode formatBastian Koppelmann
Add instructions of BO opcode format. Add microcode generator functions gen_swap, gen_ldmst. Add microcode generator functions gen_st/ld_preincr, which write back the address after the memory access. Add helper for circular and bit reverse addr mode calculation. Add sign extended bitmask for BO_OFF10 field. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-10-20target-tricore: Add instructions of BIT opcode formatBastian Koppelmann
Add instructions of BIT opcode format. Add microcode generator functions gen_bit_1/2op to do 1/2 bit operations on the last bit. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-10-20target-tricore: Add instructions of B opcode formatBastian Koppelmann
Add instructions of B opcode format. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-10-20target-tricore: Add instructions of ABS, ABSB opcode formatBastian Koppelmann
Add instructions of ABS, ABSB opcode format. Add microcode generator functions for ld/st of two 32bit reg as one 64bit value. Add microcode generator functions for ldmst and swap. Add helper ldlcx, lducx, stlcx and stucx. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-10-20target-tricore: Cleanup and BugfixesBastian Koppelmann
Move FCX loading of save_context_ to caller functions, for STLCX, STUCX insn to use those functions. Move FCX storing of restore_context_ to caller functions, for LDLCX, LDUCX insn to use those functions. Remove do_raise_exception function, which caused clang to emit a warning. Fix: save_context_lower now saves a[11] instead of PSW. Fix: MASK_OP_ABSB_BPOS starting at wrong offset. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-09-25target-tricore: Remove the dummy interrupt boilerplateRichard Henderson
It can go back in when it actually does something. Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1410626734-3804-18-git-send-email-rth@twiddle.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SR opcode formatBastian Koppelmann
Add instructions of SR opcode format. Add micro-op generator functions for saturate. Add helper return from exception (rfe). Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-16-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SLR, SSRO and SRO opcode formatBastian Koppelmann
Add instructions of SLR, SSRO and SRO opcode format. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1409572800-4116-15-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SC opcode formatBastian Koppelmann
Add instructions of SC opcode format. Add helper for begin interrupt service routine. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-14-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SBR opcode formatBastian Koppelmann
Add instructions of SBR opcode format. Add gen_loop micro-op generator function. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1409572800-4116-13-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SBC and SBRN opcode formatBastian Koppelmann
Add instructions of SBC and SBRN opcode format. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1409572800-4116-12-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SB opcode formatBastian Koppelmann
Add instructions of SB opcode format. Add helper call/ret. Add micro-op generator functions for branches. Add makro to generate helper functions. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-11-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SRRS and SLRO opcode formatBastian Koppelmann
Add instructions of SSRS and SLRO opcode format. Add micro-op generator functions for offset loads. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1409572800-4116-10-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SSR opcode formatBastian Koppelmann
Add instructions of SSR opcode format. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1409572800-4116-9-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SRR opcode formatBastian Koppelmann
Add instructions of SRR opcode format. Add helper for add/sub_ssov. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-8-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add instructions of SRC opcode formatBastian Koppelmann
Add instructions of SRC opcode format. Add micro-op generator functions for add, conditional add/sub and shi/shai. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1409572800-4116-7-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add masks and opcodes for decodingBastian Koppelmann
Add masks and opcodes for decoding TriCore instructions. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1409572800-4116-6-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add initialization for translation and activate targetBastian Koppelmann
Add tcg and cpu model initialization. Add gen_intermediate_code function. Activate target in configure and add softmmu config. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-5-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add softmmu supportBastian Koppelmann
Add basic softmmu support for TriCore Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-4-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-09-01target-tricore: Add target stubs and qom-cpuBastian Koppelmann
Add TriCore target stubs, and QOM cpu, and Maintainer Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-2-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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