Age | Commit message (Expand) | Author |
2015-01-27 | target-tricore: Add instructions of RR1 opcode format, that have 0x93 as firs... | Bastian Koppelmann |
2015-01-26 | target-tricore: split up suov32 into suov32_pos and suov32_neg | Bastian Koppelmann |
2015-01-26 | target-tricore: Fix bugs found by coverity | Bastian Koppelmann |
2015-01-26 | target-tricore: calculate av bits before saturation | Bastian Koppelmann |
2015-01-26 | target-tricore: Several translator and cpu model fixes | Bastian Koppelmann |
2015-01-26 | target-tricore: Add missing ULL suffix on 64 bit constant | Peter Maydell |
2015-01-15 | target-tricore: Fix new typos | Stefan Weil |
2015-01-09 | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging | Peter Maydell |
2015-01-03 | gen-icount: check cflags instead of use_icount global | Paolo Bonzini |
2014-12-21 | target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as firs... | Bastian Koppelmann |
2014-12-21 | target-tricore: Fix MFCR/MTCR insn and B format offset. | Bastian Koppelmann |
2014-12-21 | target-tricore: Add missing 1.6 insn of BOL opcode format | Bastian Koppelmann |
2014-12-21 | target-tricore: Add instructions of RR opcode format, that have 0x4b as the f... | Bastian Koppelmann |
2014-12-21 | target-tricore: Add instructions of RR opcode format, that have 0x1 as the fi... | Bastian Koppelmann |
2014-12-21 | target-tricore: Add instructions of RR opcode format, that have 0xf as the fi... | Bastian Koppelmann |
2014-12-21 | target-tricore: Add instructions of RR opcode format, that have 0xb as the fi... | Bastian Koppelmann |
2014-12-21 | target-tricore: Change SSOV/SUOV makro name to SSOV32/SUOV32 | Bastian Koppelmann |
2014-12-21 | target-tricore: Fix mask handling JNZ.T being 7 bit long | Bastian Koppelmann |
2014-12-21 | target-tricore: pretty-print register dump and show more status registers | Alex Zuepke |
2014-12-21 | target-tricore: add missing 64-bit MOV in RLC format | Alex Zuepke |
2014-12-21 | target-tricore: typo in BOL format | Alex Zuepke |
2014-12-21 | target-tricore: fix offset masking in BOL format | Alex Zuepke |
2014-12-10 | target-tricore: Add instructions of RCR opcode format | Bastian Koppelmann |
2014-12-10 | target-tricore: Add instructions of RLC opcode format | Bastian Koppelmann |
2014-12-10 | target-tricore: Add instructions of RCPW, RCRR and RCRW opcode format | Bastian Koppelmann |
2014-12-10 | target-tricore: Make TRICORE_FEATURES implying others. | Bastian Koppelmann |
2014-12-10 | target-tricore: Add instructions of RC opcode format | Bastian Koppelmann |
2014-12-10 | target-tricore: Add instructions of BRR opcode format | Bastian Koppelmann |
2014-12-10 | target-tricore: Add instructions of BRN opcode format | Bastian Koppelmann |
2014-12-10 | target-tricore: Add instructions of BRC opcode format | Bastian Koppelmann |
2014-12-10 | target-tricore: Add instructions of BOL opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Add instructions of BO opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Add instructions of BIT opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Add instructions of B opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Add instructions of ABS, ABSB opcode format | Bastian Koppelmann |
2014-10-20 | target-tricore: Cleanup and Bugfixes | Bastian Koppelmann |
2014-09-25 | target-tricore: Remove the dummy interrupt boilerplate | Richard Henderson |
2014-09-01 | target-tricore: Add instructions of SR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SLR, SSRO and SRO opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SC opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SBR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SBC and SBRN opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SB opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SRRS and SLRO opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SSR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SRR opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add instructions of SRC opcode format | Bastian Koppelmann |
2014-09-01 | target-tricore: Add masks and opcodes for decoding | Bastian Koppelmann |
2014-09-01 | target-tricore: Add initialization for translation and activate target | Bastian Koppelmann |
2014-09-01 | target-tricore: Add softmmu support | Bastian Koppelmann |