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path: root/target-tricore/op_helper.c
AgeCommit message (Expand)Author
2015-01-27target-tricore: Add instructions of RRR opcode formatBastian Koppelmann
2015-01-26target-tricore: split up suov32 into suov32_pos and suov32_negBastian Koppelmann
2015-01-26target-tricore: calculate av bits before saturationBastian Koppelmann
2015-01-26target-tricore: Several translator and cpu model fixesBastian Koppelmann
2015-01-26target-tricore: Add missing ULL suffix on 64 bit constantPeter Maydell
2014-12-21target-tricore: Add instructions of RR1 opcode format, that have 0xb3 as firs...Bastian Koppelmann
2014-12-21target-tricore: Add instructions of RR opcode format, that have 0x4b as the f...Bastian Koppelmann
2014-12-21target-tricore: Add instructions of RR opcode format, that have 0xf as the fi...Bastian Koppelmann
2014-12-21target-tricore: Add instructions of RR opcode format, that have 0xb as the fi...Bastian Koppelmann
2014-12-21target-tricore: Change SSOV/SUOV makro name to SSOV32/SUOV32Bastian Koppelmann
2014-12-10target-tricore: Add instructions of RCR opcode formatBastian Koppelmann
2014-12-10target-tricore: Add instructions of RLC opcode formatBastian Koppelmann
2014-12-10target-tricore: Add instructions of RC opcode formatBastian Koppelmann
2014-10-20target-tricore: Add instructions of BO opcode formatBastian Koppelmann
2014-10-20target-tricore: Add instructions of ABS, ABSB opcode formatBastian Koppelmann
2014-10-20target-tricore: Cleanup and BugfixesBastian Koppelmann
2014-09-01target-tricore: Add instructions of SR opcode formatBastian Koppelmann
2014-09-01target-tricore: Add instructions of SC opcode formatBastian Koppelmann
2014-09-01target-tricore: Add instructions of SB opcode formatBastian Koppelmann
2014-09-01target-tricore: Add instructions of SRR opcode formatBastian Koppelmann
2014-09-01target-tricore: Add softmmu supportBastian Koppelmann
2014-09-01target-tricore: Add target stubs and qom-cpuBastian Koppelmann
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