| Age | Commit message (Expand) | Author |
|---|
| 2008-09-09 | Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG | blueswir1 |
| 2008-09-06 | Fix a typo in fpsub32 | blueswir1 |
| 2008-09-06 | Convert most env fields to TCG registers | blueswir1 |
| 2008-09-06 | Silence gcc warning about constant overflow | blueswir1 |
| 2008-09-03 | Implement no-fault loads | blueswir1 |
| 2008-09-02 | Fix sign extension problems with smul and umul (Vince Weaver) | blueswir1 |
| 2008-09-01 | Fix y register loads and stores | blueswir1 |
| 2008-08-30 | Remove memcpy32() prototype leftover from r5109 | blueswir1 |
| 2008-08-29 | Fix FCC handling for Sparc64 target, initial patch by Vince Weaver | blueswir1 |
| 2008-08-29 | Fix Sparc64 boot on i386 host: | blueswir1 |
| 2008-08-25 | Fix udiv and sdiv on Sparc64 (Vince Weaver) | blueswir1 |
| 2008-08-21 | Fix wrwim masking (Luis Pureza) | blueswir1 |
| 2008-08-21 | Use initial CPU definition structure for some CPU fields instead of copying | blueswir1 |
| 2008-08-17 | Correct 32bit carry flag for add instruction (Igor Kovalenko) | blueswir1 |
| 2008-08-06 | Fix faligndata (Vince Weaver) | blueswir1 |
| 2008-08-06 | Fix I/D MMU tag reads | blueswir1 |
| 2008-08-06 | Fix Sparc64 shifts | blueswir1 |
| 2008-08-06 | Fix offset handling for ASI loads and stores (Vince Weaver) | blueswir1 |
| 2008-08-01 | Handle wrapped registers correctly when saving | blueswir1 |
| 2008-07-29 | Fix cmp/subcc/addcc op bugs reported by Vince Weaver | blueswir1 |
| 2008-07-25 | Make MAXTL dynamic, bounds check tl when indexing | blueswir1 |
| 2008-07-24 | Sparc32: save/load all MMU registers, Sparc64: add CPU save/load | blueswir1 |
| 2008-07-22 | Add T1 and T2 CPUs, add a Sun4v machine | blueswir1 |
| 2008-07-21 | Use MMU globals for some MMU traps | blueswir1 |
| 2008-07-21 | Fix reset vector | blueswir1 |
| 2008-07-20 | Print default and available CPU features separately | blueswir1 |
| 2008-07-20 | Make UA200x features selectable, add MMU types | blueswir1 |
| 2008-07-19 | Remove unused variable | blueswir1 |
| 2008-07-19 | Implement nucleus quad ldda | blueswir1 |
| 2008-07-19 | Update TLB miss addresses | blueswir1 |
| 2008-07-18 | Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. | ths |
| 2008-07-18 | wrhpr hstick_cmpr is a store, not a load | blueswir1 |
| 2008-07-17 | Fix saving and loading of trap state | blueswir1 |
| 2008-07-17 | Support for address masking | blueswir1 |
| 2008-07-16 | Fix MMU registers, add more E-cache ASIs | blueswir1 |
| 2008-07-16 | Fix MMU miss traps | blueswir1 |
| 2008-07-16 | Flushw can generate exceptions, so save PC & NPC | blueswir1 |
| 2008-07-15 | Really fix cas | blueswir1 |
| 2008-07-08 | Implement some Ultrasparc cache ASIs used by SILO | blueswir1 |
| 2008-07-01 | Move interrupt_request and user_mode_only to common cpu state. | pbrook |
| 2008-06-30 | Move CPU save/load registration to common code. | pbrook |
| 2008-06-29 | Add instruction counter. | pbrook |
| 2008-06-26 | Fix bogus format, reading uninitialised memory (original patch by Julian Seward) | blueswir1 |
| 2008-06-24 | Fix Sparc mmu bug seen with NetBSD, based on patch by Cliff Wright | blueswir1 |
| 2008-06-23 | Fix compiler warning (Jan Kiszka) | blueswir1 |
| 2008-06-22 | Eliminate cpu_T[0] | blueswir1 |
| 2008-06-22 | Eliminate cpu_T[1] | blueswir1 |
| 2008-06-22 | Add missing keys, sendkey support for all keys | blueswir1 |
| 2008-06-21 | Convert some cpu_dst uses (with loads/stores) to cpu_tmp0 | blueswir1 |
| 2008-06-21 | Avoid brcond problems, use temps for cpu_src1 & cpu_src2 | blueswir1 |
