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AgeCommit message (Expand)Author
2008-03-11 Use a TCG global for regwptrblueswir1
2008-03-09 Convert andn, orn and xnor to TCGblueswir1
2008-03-08 Convert branches and conditional moves to TCGblueswir1
2008-03-06 Convert exception ops to TCGblueswir1
2008-03-06 Fix microSPARC II SFSR mask (Robert Reif)blueswir1
2008-03-05 Convert Sparc64 trap state ops to TCGblueswir1
2008-03-04 Convert float helpers to TCG, fix fabsq in the processblueswir1
2008-03-04 Convert fmovr to TCGblueswir1
2008-03-02 Convert tick operations to TCGblueswir1
2008-03-02 Convert movr and (partially) movcc to TCGblueswir1
2008-03-02 Convert addx, subx, next_insn and mov_pc_npc to TCGblueswir1
2008-02-27 Temporary fix for i386 hostblueswir1
2008-02-24 Modify Sparc32/64 to use TCGblueswir1
2008-02-14 Fix remote debugger memory access problems reported by Matthias Steinblueswir1
2008-02-11 Sparc32 MMU register fixes (Robert Reif)blueswir1
2008-02-01use the TCG code generatorbellard
2008-01-01 More ASIsblueswir1
2007-12-30 Nicer debug output for exceptionsblueswir1
2007-12-28 Initial support for Sun4d machines (SS-1000, SS-2000)blueswir1
2007-12-28 Improved ASI debugging (Robert Reif)blueswir1
2007-12-25 Enforce context table alignmentblueswir1
2007-12-11 Partial fix to Sparc32 Linux host global register mangling problemblueswir1
2007-12-10 Add ASIs (Robert Reif)blueswir1
2007-12-09Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths
2007-11-29 Increase prom size for boot modeblueswir1
2007-11-28Use slavio base as boot prom address, rearrange sun4m init codeblueswir1
2007-11-28 Fix compilation and warnings on PPC hostblueswir1
2007-11-25 Fix floating point register decodingblueswir1
2007-11-25 128-bit float support for user modeblueswir1
2007-11-25 More MMU registers (Robert Reif)blueswir1
2007-11-19 Fix MXCC register 64 bit read word order (Robert Reif)blueswir1
2007-11-17Break up vl.h.pbrook
2007-11-17 Remove unnecessary register masking (Robert Reif)blueswir1
2007-11-17 Fix MXCC error register (Robert Reif)blueswir1
2007-11-17 Add MXCC module reset register (Robert Reif)blueswir1
2007-11-11removed warningbellard
2007-11-10added cpu_model parameter to cpu_init()bellard
2007-11-10 More Sparc64 CPU definitionsblueswir1
2007-11-09 More CPU definitionsblueswir1
2007-11-07 CPU specific boot mode (Robert Reif)blueswir1
2007-10-29Adjust s390 addresses (the MSB is defined as "to be ignored").ths
2007-10-28 Use shared ctpop64 helperblueswir1
2007-10-20 Avoid gcc warningsblueswir1
2007-10-20 Fix compiling Sparc64 on PPC hostblueswir1
2007-10-17 Use ldq and stq for 8 byte accesses (original patch by Robert Reif)blueswir1
2007-10-17 Enable all alignment checksblueswir1
2007-10-14 Fix bug in Sparc32 sta op (Robert Reif)blueswir1
2007-10-14 Sparc64 hypervisor modeblueswir1
2007-10-14 SuperSparc MXCC support (Robert Reif)blueswir1
2007-10-14 Support for 32 bit ABI on 64 bit targets (only enabled Sparc64)blueswir1
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