slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2012-10-07	target-sparc: Move taddcctv and tsubcctv out of line	Richard Henderson
2012-10-07	target-sparc: Tidy Tcc	Richard Henderson
2012-10-07	target-sparc: Move sdivx and udivx out of line	Richard Henderson
2012-10-07	target-sparc: Use movcond in gen_generic_branch	Richard Henderson
2012-10-07	target-sparc: Use DisasCompare and movcond in MOVR	Richard Henderson
2012-10-07	target-sparc: Use DisasCompare and movcond in MOVCC	Richard Henderson
2012-10-07	target-sparc: Use DisasCompare and movcond in FMOVR, FMOVCC	Richard Henderson
2012-10-07	target-sparc: Use DisasCompare in Tcc	Richard Henderson
2012-10-07	target-sparc: Introduce DisasCompare and functions to generate it	Richard Henderson
2012-10-07	target-sparc: Tidy gen_generic_branch interface	Richard Henderson
2012-10-07	target-sparc: Tidy save_npc interface	Richard Henderson
2012-10-07	target-sparc: Tidy gen_mov_pc_npc interface	Richard Henderson
2012-10-07	target-sparc: Tidy save_state interface	Richard Henderson
2012-10-07	target-sparc: Tidy gen_trap_ifnofpu interface	Richard Henderson
2012-10-07	target-sparc: Tidy flush_cond interface	Richard Henderson
2012-10-07	target-sparc: Tidy do_branch interfaces	Richard Henderson
2012-09-27	Emit debug_insn for CPU_LOG_TB_OP_OPT as well.	Richard Henderson
2012-05-12	Implement address masking for SPARC v9 CPUs	Artyom Tarasenko
2012-03-18	Sparc: avoid AREG0 wrappers for memory access helpers	Blue Swirl
2012-03-18	Sparc: avoid AREG0 for memory access helpers	Blue Swirl
2012-03-14	target-sparc: Don't overuse CPUState	Andreas Färber
2011-11-19	Improve "ta 0" shutdown	Fabien Chouteau
2011-10-26	target-sparc: Implement FALIGNDATA inline.	Richard Henderson
2011-10-26	target-sparc: Implement BMASK/BSHUFFLE.	Richard Henderson
2011-10-26	target-sparc: Implement ALIGNADDR* inline.	Richard Henderson
2011-10-26	target-sparc: Implement EDGE* instructions.	Richard Henderson
2011-10-26	target-sparc: Implement fpack{16,32,fix}.	Richard Henderson
2011-10-26	target-sparc: Implement PDIST.	Richard Henderson
2011-10-26	target-sparc: Do exceptions management fully inside the helpers.	Richard Henderson
2011-10-26	target-sparc: Change fpr representation to doubles.	Richard Henderson
2011-10-26	target-sparc: Undo cpu_fpr rename.	Richard Henderson
2011-10-26	target-sparc: Extract float128 move to a function.	Richard Henderson
2011-10-26	target-sparc: Extract common code for floating-point operations.	Richard Henderson
2011-10-26	target-sparc: Make FPU/VIS helpers const when possible.	Richard Henderson
2011-10-26	target-sparc: Pass float64 parameters instead of dt0/1 temporaries.	Richard Henderson
2011-10-26	target-sparc: Add accessors for double-precision fpr access.	Richard Henderson
2011-10-26	target-sparc: Mark fprs dirty in store accessor.	Richard Henderson
2011-10-26	target-sparc: Add accessors for single-precision fpr access.	Richard Henderson
2011-10-26	Sparc: avoid AREG0 for division op helpers	Blue Swirl
2011-10-26	Sparc: avoid AREG0 for softint op helpers and Leon cache control	Blue Swirl
2011-10-26	Sparc: avoid AREG0 for CWP and PSTATE helpers	Blue Swirl
2011-10-25	target-sparc: Fix order of function parameters	Stefan Weil
2011-10-23	Sparc: avoid AREG0 for lazy condition code helpers	Blue Swirl
2011-10-23	Sparc: avoid AREG0 for float and VIS ops	Blue Swirl
2011-10-23	Sparc: avoid AREG0 for raise_exception and helper_debug	Blue Swirl
2011-08-06	Fix handling of conditional branches in delay slot of a conditional branch	Artyom Tarasenko
2011-07-30	SPARC64: implement %fprs dirty bits	Tsuneo Saito
2011-07-30	SPARC64: fix fnor* and fnand*	Tsuneo Saito
2011-07-20	SPARC64: add missing break on fmovdcc	Tsuneo Saito
2011-07-20	SPARC64: fix VIS1 SIMD signed compare instructions	Tsuneo Saito