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path: root/target-sparc/translate.c
AgeCommit message (Expand)Author
2008-09-06Silence gcc warning about constant overflowblueswir1
2008-09-02Fix sign extension problems with smul and umul (Vince Weaver)blueswir1
2008-09-01Fix y register loads and storesblueswir1
2008-08-29Fix FCC handling for Sparc64 target, initial patch by Vince Weaverblueswir1
2008-08-21Fix wrwim masking (Luis Pureza)blueswir1
2008-08-21Use initial CPU definition structure for some CPU fields instead of copyingblueswir1
2008-08-17Correct 32bit carry flag for add instruction (Igor Kovalenko)blueswir1
2008-08-06Fix Sparc64 shiftsblueswir1
2008-08-06Fix offset handling for ASI loads and stores (Vince Weaver)blueswir1
2008-07-29Fix cmp/subcc/addcc op bugs reported by Vince Weaverblueswir1
2008-07-20Make UA200x features selectable, add MMU typesblueswir1
2008-07-19Implement nucleus quad lddablueswir1
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths
2008-07-18wrhpr hstick_cmpr is a store, not a loadblueswir1
2008-07-17Support for address maskingblueswir1
2008-07-16Flushw can generate exceptions, so save PC & NPCblueswir1
2008-07-15Really fix casblueswir1
2008-06-29Add instruction counter.pbrook
2008-06-22Eliminate cpu_T[0]blueswir1
2008-06-22Eliminate cpu_T[1]blueswir1
2008-06-21Convert some cpu_dst uses (with loads/stores) to cpu_tmp0blueswir1
2008-06-21Avoid brcond problems, use temps for cpu_src1 & cpu_src2blueswir1
2008-06-15Avoid temporary variable use across basic blocks for udivxblueswir1
2008-06-07Allow NWINDOWS selection (CPU feature with model specific defaults)blueswir1
2008-05-29MicroSparc I didn't have fsmuld opblueswir1
2008-05-27Free tempsblueswir1
2008-05-26More TCG type fixesblueswir1
2008-05-26Fix cas on i386blueswir1
2008-05-25remove absolete functionbellard
2008-05-25Nicer debug outputblueswir1
2008-05-24More TCGv type fixes.pbrook
2008-05-24Fix ARM conditional branch bug.pbrook
2008-05-24Fix helper operand type mismatch.pbrook
2008-05-22Register op helpersblueswir1
2008-05-17Generate better code for Sparc32 shiftsblueswir1
2008-05-12Wrap long linesblueswir1
2008-05-11Remove someexplicit alignment checks (initial patch by Fabrice Bellard)blueswir1
2008-05-10Add a TODO fileblueswir1
2008-05-10suppressed fixed registersbellard
2008-05-10Fix compiler warningsblueswir1
2008-05-09CPU feature selection supportblueswir1
2008-05-07Simplify some constant loadsblueswir1
2008-05-07Fix potential condition code problemsblueswir1
2008-05-04Complete the TCG conversionblueswir1
2008-05-04Avoid some brcondsblueswir1
2008-05-03Use memory based registers in functions containing brcondsblueswir1
2008-04-28Factorize code in translate.caurel32
2008-04-23Document the shift valuesblueswir1
2008-03-30Remove incorrect discards and old unused defines (blueswir1).pbrook
2008-03-29 Change handling of source 2blueswir1
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