aboutsummaryrefslogtreecommitdiff
path: root/target-sparc/op_helper.c
AgeCommit message (Collapse)Author
2009-11-04Sparc: fix carry flag handling (Solaris bootblk fix)Artyom Tarasenko
The page 108 of the SPARC Version 8 Architecture Manual describes that addcc and addxcc shall compute carry flag the same way. The page 110 claims the same about subcc and subxcc instructions. This patch fixes carry computation in corner cases and removes redundant code. The most visible effect of the patch is enabling Solaris boot when using OBP. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> [blauwirbel@gmail.com: cleaned up formatting] Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-13sparc64: fix done instruction pcIgor V. Kovalenko
Fix done instruction to resume with pc=tnpc, npc=tnpc+4 Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-23sparc64-8bit-asiIgor V. Kovalenko
Sparc64 alternate space load/store helpers expect 8 bit ASI value, while wrasi implementation sign-extends ASI operand causing for example 0x80 to appear as 0xFFFFFF80. Resulting value falls out of switch in helpers and causes obscure load/store faults. - correct wrasi by masking lower 8 bits of xor result - use lower 8 bits of ASI register in helpers Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-04Sparc64: replace tsptr with helper routineIgor Kovalenko
tl and tsptr of members sparc64 cpu state must be changed simultaneously to keep trap state window in sync with current trap level. Currently translation of store to tl does not change tsptr, which leads to corrupt trap state on corresponding trap level. This patch removes tsptr from sparc64 cpu state and replaces all uses with call to helper routine. Changes v0->v1: - reimplemented helper routine with tcg generator - on cpu reset trap type and pstate are populated with power-on reset values, including tl=maxtl Signed-off-by: igor.v.kovalenko@gmail.com Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27sparc64 really implement itlb/dtlb automatic replacement writesIgor Kovalenko
- implement "used" bit in tlb translation entry - mark tlb entry used if qemu code/data translation succeeds - fold i/d mmu replacement writes code into replace_tlb_1bit_lru which adds 1bit lru replacement algorithm; previously code tried to replace first unlocked entry only - extract more bitmasks to named macros - add "immu" or "dmmu" type name to debugging output where appropriate Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-07-27sparc64 name mmu registers and general cleanupIgor Kovalenko
- add names to mmu registers, this helps understanding the code which uses/modifies them. - fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries - extract demap_tlb routine (code duplication) - extract replace_tlb routine (code duplication) - flush qemu tlb translations when replacing sparc64 mmu tlb entries I have no test case which demands flushing qemu translations, and this patch should have no other visible changes to runtime. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-07-20Fix most warnings (errors with -Werror) when debugging is enabledBlue Swirl
I used the following command to enable debugging: perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/* Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-12sparc64: trap handling correctionsIgor Kovalenko
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote: > On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote: >> Good trap handling is required to process interrupts. >>  This patch fixes the following: >> >>  - sparc64 has no wim register >>  - sparc64 has no psret register, use IE bit of pstate >>   extract IE checking code to cpu_interrupts_enabled >>  - alternate globals are not available if cpu has GL feature >>   in this case bit AG of pstate is constant zero >>  - write to pstate must actually write pstate >>   even if cpu has GL feature >> >>  Also timer interrupt is handled using do_interrupt. > > A bit too much for one patch. Please also remove the code instead of > commenting out. I now excluded timer interrupt related part. To my mind other changes are essentially tied together. > PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32. Fixed, please find attached the updated version. -- Kind regards, Igor V. Kovalenko
2009-07-12sparc64: fix helper_st_asi little endian case typoIgor Kovalenko
On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<sdbrady@ntlworld.com> wrote: > On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote: >> It is clear that intention is to byte-swap value to be written, not >> the target address. > > @@ -1949,13 +1949,13 @@ void helper_st_asi(target_ulong addr, ta >     case 0x89: // Secondary LE >         switch(size) { >         case 2: > -            addr = bswap16(addr); > +            addr = bswap16(val); >             ^^^^ > Shouldn't that be 'val = bswap16(val)' (and likewise for the 32-bit and > 64-bit cases)?  Also needs a 'signed-off-by:'... > > Cheers, > -- > Stuart Brady > Thanks, that part I did not runtime-tested. Not sure if those asi stores are of any use for user-mode emulator. Please find attached the corrected version. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-05-13Replace gcc variadic macro extension with C99 versionBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Convert udiv/sdivBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Convert tagged opsBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Convert subxBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Convert subBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Convert logical operations and umul/smulBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Convert addxBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Convert addBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10Use dynamical computation for condition codesBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-25Fix a warning in sparc64-linux-user buildBlue Swirl
2009-04-25sparc64 support TSB related MMU registersIgor Kovalenko
Posting updated patch to the list... >>> On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <blauwirbel@gmail.com> wrote: >>>  > >>>  > Nice, though I didn't notice any visible improvement in my tests. >>> >>> This early in boot process there is not much to output; and I test >>>  recent kernel which may use different startup sequence. >>>  I modified openbios cif handler to output arguments and I now can see >>>  visible difference. >>> >>> >>>  > >>>  > About the patch, there are a few problems: >>>  > - it breaks Sparc32 >>> >>> You mean it stops working? >> >> Does not even build. Fixed now. >>>  > - commented out code is ugly >>>  > - if and else should be on the same line as '{' or '}' >>>  > - long lines should be wrapped >>>  > - in the line: >>>  > +    return (((tag_access_register & 0x1fff)<<48)|(tag_access_register >> 22)); >>>  >  there should be white space between ) and << and 48. >>>  > >>> >> >> Also the ")|(" in between is crowded. >> >> Maybe the coding style does not describe this well enough. BTW Supplying indent template would be great. Please see the updated patch qemu-sparc64-tsb-asi-2.patch attached. -- Kind regards, Igor V. Kovalenko
2009-03-16Delete some unused macros detected with -Wp,-Wunused-macros useblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori
These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori
This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-23Add SuperSPARC MMU breakpoint registers (Robert Reif)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6125 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11Add missing "static"blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5977 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17TCG variable type checking.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07Fix error in fexpand (spotted by sparse)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5438 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03Rearrange tick functionsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02Fix MXCC printf warning (based on patch by Robert Reif)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5393 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-27Add mmu tlb demap support (Igor Kovalenko)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5332 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26Implement some UA2007 block ASIsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5328 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26Implement UA2005 hypervisor trapsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26Move also DEBUG_PCALL (see r5085)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5326 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22Add software and timer interrupt supportblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22Fix arguments used in cas/casx, thanks to Igor Kovalenko for spottingblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5296 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21Use the new concat_i32_i64 op for std and stdablueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14Fix array subscript above array bounds errorblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5219 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10Partially convert float128 conversion ops to TCGblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10Convert basic 64 bit VIS ops to TCGblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10Convert basic 32 bit VIS ops to TCGblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10Convert basic float32 ops to TCGblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-09Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03Implement no-fault loadsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29Fix Sparc64 boot on i386 host:blueswir1
- move do_interrupt() back to op_helper.c - move non-helper prototypes from helper.h to exec.h - move some prototypes from cpu.h to exec.h - do not export either set_cwp() or cpu_set_cwp() from op_helper.c, but instead provide inline functions git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-25Fix udiv and sdiv on Sparc64 (Vince Weaver)blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5085 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-04 13:38:26 +0000