Age | Commit message (Expand) | Author |
2016-01-29 | sparc: Clean up includes | Peter Maydell |
2016-01-16 | target-sparc: Migrate CWP and PIL for SPARC64 | Peter Maydell |
2016-01-16 | target-sparc: Use VMState arrays for SPARC64 TLB/MMU state | Peter Maydell |
2016-01-16 | target-sparc: Convert to VMStateDescription | Juan Quintela |
2016-01-16 | target-sparc: Don't flush TLB in cpu_load function | Peter Maydell |
2014-03-13 | cputlb: Change tlb_flush() argument to CPUState | Andreas Färber |
2012-12-19 | misc: move include files to include/qemu/ | Paolo Bonzini |
2012-03-14 | target-sparc: Don't overuse CPUState | Andreas Färber |
2011-10-26 | target-sparc: Change fpr representation to doubles. | Richard Henderson |
2011-06-26 | Remove exec-all.h include directives | Blue Swirl |
2011-06-26 | Sparc32: dummy implementation of MXCC MMU breakpoint registers | Blue Swirl |
2010-05-09 | sparc: Fix lazy flag calculation on interrupts, refactor | Blue Swirl |
2010-01-27 | sparc64: reimplement tick timers v4 | Igor V. Kovalenko |
2009-08-04 | Sparc64: replace tsptr with helper routine | Igor Kovalenko |
2009-07-27 | sparc64 name mmu registers and general cleanup | Igor Kovalenko |
2009-05-21 | Convert machine registration to use module init functions | Anthony Liguori |
2008-12-13 | Remove unnecessary trailing newlines | blueswir1 |
2008-09-26 | Add a generic Niagara machine | blueswir1 |
2008-08-01 | Handle wrapped registers correctly when saving | blueswir1 |
2008-07-25 | Make MAXTL dynamic, bounds check tl when indexing | blueswir1 |
2008-07-24 | Sparc32: save/load all MMU registers, Sparc64: add CPU save/load | blueswir1 |
2008-07-22 | Add T1 and T2 CPUs, add a Sun4v machine | blueswir1 |
2008-06-07 | Allow NWINDOWS selection (CPU feature with model specific defaults) | blueswir1 |
2008-05-04 | remove target ifdefs from vl.c | aurel32 |