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path: root/target-sparc/cpu.h
AgeCommit message (Expand)Author
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
2012-10-07target-sparc: Move sdivx and udivx out of lineRichard Henderson
2012-06-04target-sparc: Let cpu_sparc_init() return SPARCCPUAndreas Färber
2012-04-14Use uintptr_t for various op related functionsBlue Swirl
2012-04-07target-sparc: QOM'ify CPUAndreas Färber
2012-03-24target-sparc: Add compiler attribute to some functions which don't returnStefan Weil
2012-03-18Sparc: avoid AREG0 wrappers for memory access helpersBlue Swirl
2012-03-18Sparc: avoid AREG0 for memory access helpersBlue Swirl
2012-03-17sparc64: implement PCI and ISA irqsBlue Swirl
2012-03-17sparc: reset CPU state on resetBlue Swirl
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber
2012-03-14target-sparc: Don't overuse CPUStateAndreas Färber
2012-03-14target-sparc: Typedef struct CPUSPARCState earlyAndreas Färber
2011-10-26target-sparc: Change fpr representation to doubles.Richard Henderson
2011-10-26target-sparc: Pass float64 parameters instead of dt0/1 temporaries.Richard Henderson
2011-10-26Sparc: split MMU helpersBlue Swirl
2011-10-26Sparc: avoid AREG0 for softint op helpers and Leon cache controlBlue Swirl
2011-10-23Sparc: split CWP and PSTATE op helpersBlue Swirl
2011-10-23Sparc: split helper.cBlue Swirl
2011-09-10Gdbstub: Fix back-trace on SPARC32Fabien Chouteau
2011-08-07Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl
2011-07-21SPARC64: implement addtional MMU faults related to nonfaulting loadTsuneo Saito
2011-07-21SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault()Tsuneo Saito
2011-07-21SPARC64: SFSR cleanup and fixTsuneo Saito
2011-07-21SPARC64: TTE bits cleanupTsuneo Saito
2011-07-20Fix unassigned memory access handlingBlue Swirl
2011-07-14Sparc: fix FPU and AM enable checks for translationBlue Swirl
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl
2011-06-26sparc: move do_interrupt to helper.cBlue Swirl
2011-06-26Sparc32: dummy implementation of MXCC MMU breakpoint registersBlue Swirl
2011-02-01SPARC: Fix Leon3 cache controlFabien Chouteau
2011-01-24SPARC: Add asr17 register supportFabien Chouteau
2011-01-24SPARC: Emulation of Leon3Fabien Chouteau
2010-12-19Sparc: implement monitor command 'info tlb'Blue Swirl
2010-12-04target-sparc: Use fprintf_function (format checking)Stefan Weil
2010-12-03target-sparc: remove unused functions cpu_lock(), cpu_unlock()Peter Maydell
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini
2010-05-22sparc64: fix mmu context at trap levels above zeroIgor V. Kovalenko
2010-05-22sparc64: fix pstate privilege bitsIgor V. Kovalenko
2010-05-16sparc64: fix TT_WOTHER valueIgor V. Kovalenko
2010-05-09sparc: Fix lazy flag calculation on interrupts, refactorBlue Swirl
2010-05-06sparc64: handle asi referencing nucleus and secondary MMU contextsIgor V. Kovalenko
2010-05-06sparc64: implement global translation table entries v1Igor V. Kovalenko
2010-04-17target-sparc: Fix TARGET_{PHYS,VIRT}_ADDR_SPACE_BITS.Richard Henderson
2010-03-12Target specific usermode cleanupPaul Brook
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson
2010-01-27sparc64: reimplement tick timers v4Igor V. Kovalenko
2010-01-27sparc64: correct write extra bits to cwpIgor V. Kovalenko
2010-01-08sparc64: interrupt trap handlingIgor V. Kovalenko
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