aboutsummaryrefslogtreecommitdiff
path: root/target-sparc/cpu.h
AgeCommit message (Expand)Author
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini
2010-05-22sparc64: fix mmu context at trap levels above zeroIgor V. Kovalenko
2010-05-22sparc64: fix pstate privilege bitsIgor V. Kovalenko
2010-05-16sparc64: fix TT_WOTHER valueIgor V. Kovalenko
2010-05-09sparc: Fix lazy flag calculation on interrupts, refactorBlue Swirl
2010-05-06sparc64: handle asi referencing nucleus and secondary MMU contextsIgor V. Kovalenko
2010-05-06sparc64: implement global translation table entries v1Igor V. Kovalenko
2010-04-17target-sparc: Fix TARGET_{PHYS,VIRT}_ADDR_SPACE_BITS.Richard Henderson
2010-03-12Target specific usermode cleanupPaul Brook
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson
2010-01-27sparc64: reimplement tick timers v4Igor V. Kovalenko
2010-01-27sparc64: correct write extra bits to cwpIgor V. Kovalenko
2010-01-08sparc64: interrupt trap handlingIgor V. Kovalenko
2010-01-08sparc64: move cpu_interrupts_enabled to cpu.hIgor V. Kovalenko
2010-01-08sparc64: add macros to deal with softint and timer interruptIgor V. Kovalenko
2009-12-05Sparc64: handle MMU global bit and nucleus contextBlue Swirl
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
2009-10-01Get rid of _t suffixmalc
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd
2009-08-22sparc32 remove an unnecessary cpu irq setBlue Swirl
2009-08-04Sparc64: replace tsptr with helper routineIgor Kovalenko
2009-07-27sparc64 really implement itlb/dtlb automatic replacement writesIgor Kovalenko
2009-07-27sparc64 name mmu registers and general cleanupIgor Kovalenko
2009-07-12sparc64: trap handling correctionsIgor Kovalenko
2009-05-19Hardware convenience libraryPaul Brook
2009-05-10Use dynamical computation for condition codesBlue Swirl
2009-03-07The _exit syscall is used for both thread termination in NPTL applications,pbrook
2008-12-23Add SuperSPARC MMU breakpoint registers (Robert Reif)blueswir1
2008-12-23Better SuperSPARC emulation (Robert Reif)blueswir1
2008-12-23Implement tick interrupt disable bitsblueswir1
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir1
2008-10-03Rearrange tick functionsblueswir1
2008-10-03Fix missing prototype warnings by moving declarationsblueswir1
2008-09-22Add software and timer interrupt supportblueswir1
2008-09-20Move signal handler prototype back to cpu.hblueswir1
2008-09-10Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir1
2008-09-09Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir1
2008-09-06Silence gcc warning about constant overflowblueswir1
2008-08-29Fix FCC handling for Sparc64 target, initial patch by Vince Weaverblueswir1
2008-08-29Fix Sparc64 boot on i386 host:blueswir1
2008-08-21Use initial CPU definition structure for some CPU fields instead of copyingblueswir1
2008-07-25Make MAXTL dynamic, bounds check tl when indexingblueswir1
2008-07-24Sparc32: save/load all MMU registers, Sparc64: add CPU save/loadblueswir1
2008-07-21Use MMU globals for some MMU trapsblueswir1
2008-07-20Make UA200x features selectable, add MMU typesblueswir1
2008-07-16Fix MMU miss trapsblueswir1
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook
2008-06-30Move CPU save/load registration to common code.pbrook