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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-sparc
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cpu.h
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Author
2010-03-12
Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.
Richard Henderson
2010-01-27
sparc64: reimplement tick timers v4
Igor V. Kovalenko
2010-01-27
sparc64: correct write extra bits to cwp
Igor V. Kovalenko
2010-01-08
sparc64: interrupt trap handling
Igor V. Kovalenko
2010-01-08
sparc64: move cpu_interrupts_enabled to cpu.h
Igor V. Kovalenko
2010-01-08
sparc64: add macros to deal with softint and timer interrupt
Igor V. Kovalenko
2009-12-05
Sparc64: handle MMU global bit and nucleus context
Blue Swirl
2009-10-01
Revert "Get rid of _t suffix"
Anthony Liguori
2009-10-01
Get rid of _t suffix
malc
2009-08-24
cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal
Nathan Froyd
2009-08-22
sparc32 remove an unnecessary cpu irq set
Blue Swirl
2009-08-04
Sparc64: replace tsptr with helper routine
Igor Kovalenko
2009-07-27
sparc64 really implement itlb/dtlb automatic replacement writes
Igor Kovalenko
2009-07-27
sparc64 name mmu registers and general cleanup
Igor Kovalenko
2009-07-12
sparc64: trap handling corrections
Igor Kovalenko
2009-05-19
Hardware convenience library
Paul Brook
2009-05-10
Use dynamical computation for condition codes
Blue Swirl
2009-03-07
The _exit syscall is used for both thread termination in NPTL applications,
pbrook
2008-12-23
Add SuperSPARC MMU breakpoint registers (Robert Reif)
blueswir1
2008-12-23
Better SuperSPARC emulation (Robert Reif)
blueswir1
2008-12-23
Implement tick interrupt disable bits
blueswir1
2008-11-18
Refactor translation block CPU state handling (Jan Kiszka)
aliguori
2008-11-18
Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
aliguori
2008-10-06
Show size for unassigned accesses (Robert Reif)
blueswir1
2008-10-03
Rearrange tick functions
blueswir1
2008-10-03
Fix missing prototype warnings by moving declarations
blueswir1
2008-09-22
Add software and timer interrupt support
blueswir1
2008-09-20
Move signal handler prototype back to cpu.h
blueswir1
2008-09-10
Convert rest of ops using float32 to TCG, remove FT0 and FT1
blueswir1
2008-09-09
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
blueswir1
2008-09-06
Silence gcc warning about constant overflow
blueswir1
2008-08-29
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
blueswir1
2008-08-29
Fix Sparc64 boot on i386 host:
blueswir1
2008-08-21
Use initial CPU definition structure for some CPU fields instead of copying
blueswir1
2008-07-25
Make MAXTL dynamic, bounds check tl when indexing
blueswir1
2008-07-24
Sparc32: save/load all MMU registers, Sparc64: add CPU save/load
blueswir1
2008-07-21
Use MMU globals for some MMU traps
blueswir1
2008-07-20
Make UA200x features selectable, add MMU types
blueswir1
2008-07-16
Fix MMU miss traps
blueswir1
2008-07-01
Move interrupt_request and user_mode_only to common cpu state.
pbrook
2008-06-30
Move CPU save/load registration to common code.
pbrook
2008-06-29
Add instruction counter.
pbrook
2008-06-23
Fix compiler warning (Jan Kiszka)
blueswir1
2008-06-07
Allow NWINDOWS selection (CPU feature with model specific defaults)
blueswir1
2008-05-30
Fix typo.
pbrook
2008-05-30
Move clone() register setup to target specific code. Handle fork-like clone.
pbrook
2008-05-29
MicroSparc I didn't have fsmuld op
blueswir1
2008-05-29
Push common interrupt variables to cpu-defs.h (Glauber Costa)
bellard
2008-05-28
moved halted field to CPU_COMMON
bellard
2008-05-12
Wrap long lines
blueswir1
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