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path: root/target-sh4/translate.c
AgeCommit message (Expand)Author
2011-01-14target-sh4: fix reset on r2dAurelien Jarno
2011-01-14target-sh4: optimize exceptionsAurelien Jarno
2011-01-14target-sh4: add ftrv instructionAurelien Jarno
2011-01-14target-sh4: add fipr instructionAurelien Jarno
2011-01-14target-sh4: implement flush-to-zeroAurelien Jarno
2011-01-14target-sh4: define FPSCR constantsAurelien Jarno
2011-01-14target-sh4: use default-NaN modeAurelien Jarno
2011-01-11target-sh4: fix fpu disabled/illegal exceptionAurelien Jarno
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil
2010-07-12target-sh4: Add support for ldc & stc with sgrAlexandre Courbot
2010-07-12target-sh4: Split the LDST macro into 2 sub-macrosAlexandre Courbot
2010-05-05target-sh4: Remove duplicate CPU log.Richard Henderson
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini
2010-02-09target-sh4: MMU: fix mem_idx computationAurelien Jarno
2010-02-08target-sh4: minor optimisationsAurelien Jarno
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl
2009-05-13Include assert.h from qemu-common.hPaul Brook
2009-04-24qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori
2009-04-05Add new command line option -singlestep for tcg single stepping.aurel32
2009-04-01SH: Improve movca.l/ocbi emulation.edgar_igl
2009-03-02SH: Implement MOVCO.L and MOVLI.Laurel32
2009-02-07SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an...aurel32
2009-02-05targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori
2009-01-26Log reset events (Jan Kiszka)aliguori
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori
2009-01-14sh4: Add FMAC instruction supportaurel32
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel32
2009-01-01tcg_temp_local_new should take no parameteraurel32
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc
2008-12-13target-sh4: make the initial value of SR easier to readaurel32
2008-12-13target-sh4: don't disable FPU instructions in user modeaurel32
2008-12-13target-sh4: disable debug codeaurel32
2008-12-13target-sh4: add prefi, icbi, syncoaurel32
2008-12-13target-sh4: add SH7785 as CPU optionaurel32
2008-12-10target-sh4: check FD bit for FP instructionsaurel32
2008-12-07SH4: kill a few warningsaurel32
2008-12-07SH4: Implement FD bitaurel32
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori
2008-11-22target-sh4: fix 64-bit fmov to/from memoryaurel32
2008-11-20target-sh4: fix fldi0/fldi1aurel32
2008-11-19target-sh4: map FP registers as TCG variablesaurel32
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori
2008-11-17TCG variable type checking.pbrook
2008-10-26Fix undeclared symbol warnings from sparseblueswir1
2008-10-12SH4: Implement MOVUA.Laurel32
2008-10-12SH4: fix single-steppingaurel32
2008-10-12SH4: Fix swap.baurel32
2008-10-05Silence some warnings about no value returned from non-void functionblueswir1
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