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path: root/target-sh4/translate.c
AgeCommit message (Expand)Author
2008-08-22sh4: fix tas.b @Rn instructionaurel32
2008-08-22[sh4] code translation bug fixaurel32
2008-08-22[sh4] delay slot bug fixaurel32
2008-08-22[sh4] sleep instructionaurel32
2008-08-17Fix warnings that would be generated by gcc -Wstrict-prototypesblueswir1
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths
2008-06-29Add missing static qualifiers.pbrook
2008-06-29Add instruction counter.pbrook
2008-05-09SH4 MMU improvementsaurel32
2008-04-28Factorize code in translate.caurel32
2008-04-11Remove osdep.c/qemu-img code duplicationaurel32
2008-03-11SH4, fix several instructionsaurel32
2008-02-01use the TCG code generatorbellard
2007-12-02SH4 delay slot code update, by Magnus Damm.ths
2007-11-11fixed FPU rounding initbellard
2007-11-10added cpu_model parameter to cpu_init()bellard
2007-09-29Fix rte opcode, by Magnus Damm.ths
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
2007-09-11Fix tb->size mishandling, by Daniel Jacobowitz.ths
2007-08-26SH4 mov.b fix, by Vince Weaver.ths
2007-06-22Ignore PR flag in FPSCR when performing fmov, by Magnus Damm.ths
2007-06-22Document FPSCR usage, by Magnus Damm.ths
2007-06-22Use DREG() instead of XREG() wherever possible, by Magnus Damm.ths
2007-06-22Emulate more fpu opcodes, by Magnus Damm.ths
2007-06-22Set FD bit in SR to emulate kernel behaviour, by Magnus Damm.ths
2007-05-13Fix XHACK() macro and use FREG if possible, by Magnus Damm.ths
2007-04-26Fix opcode for sts.l fpul/cpscr, by Magnus Damm.ths
2007-03-19Define gen_intermediate_code_internal as "static inline".ths
2006-06-18SH bugfixes.pbrook
2006-06-17Remove debug output.pbrook
2006-06-17SH usermode fault handling.pbrook
2006-06-17SH4 rts fix.pbrook
2006-06-14sh4 fmov et al instructions (amatus)bellard
2006-04-27sh4 target (Samuel Tardieu)bellard