| Age | Commit message (Expand) | Author |
|---|
| 2007-10-14 | Properly implement non-execute bit on PowerPC segments and PTEs. | j_mayer |
| 2007-10-14 | Merge PowerPC 620 input bus definitions with standard PowerPC 6xx. | j_mayer |
| 2007-10-14 | There is no need of a specific MMU model for PowerPC 601. | j_mayer |
| 2007-10-14 | Implement PowerPC 64 SLB invalidation helpers. | j_mayer |
| 2007-10-14 | Do not allow PowerPC CPU restart after entering checkstop mode. | j_mayer |
| 2007-10-14 | Generate micro-ops for PowerPC hypervisor mode. | j_mayer |
| 2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer |
| 2007-10-12 | Unify '-cpu ?' option. | j_mayer |
| 2007-10-08 | Update PowerPC emulation status file. | j_mayer |
| 2007-10-08 | Remove synonymous in PowerPC MSR bits definitions. | j_mayer |
| 2007-10-08 | Real-mode only PowerPC 40x do not have any TLBs. | j_mayer |
| 2007-10-08 | Implement exception prefix feature for PowerPC 601. | j_mayer |
| 2007-10-08 | Add missing exception vectors for PowerPC 7x5. | j_mayer |
| 2007-10-07 | Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls). | j_mayer |
| 2007-10-07 | Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy. | j_mayer |
| 2007-10-07 | PowerPC target coding style fixes. | j_mayer |
| 2007-10-07 | PowerPC target optimisations: make intensive use of always_inline. | j_mayer |
| 2007-10-07 | Reorganize the CPUPPCState structure to group features. | j_mayer |
| 2007-10-07 | Add MSR bits signification per PowerPC implementation flags (to be continued). | j_mayer |
| 2007-10-05 | Full implementation of PowerPC 64 MMU, just missing support for 1 TB | j_mayer |
| 2007-10-05 | Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific. | j_mayer |
| 2007-10-05 | PowerPC hardware reset vector is now considered as part of the exception model. | j_mayer |
| 2007-10-04 | More cache tuning fixes: | j_mayer |
| 2007-10-04 | Make PowerPC cache line size implementation dependant. | j_mayer |
| 2007-10-03 | HID0 is a write-clear register on 970 (DBSR). | j_mayer |
| 2007-10-03 | Enable PowerPC 64 MMU model and exceptions. | j_mayer |
| 2007-10-03 | Fix PowerPC initialisation and first reset: | j_mayer |
| 2007-10-03 | We never have to export ppc_set_irq. | j_mayer |
| 2007-10-02 | Code provision for hypervisor mode memory accesses. | j_mayer |
| 2007-10-01 | Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulator | j_mayer |
| 2007-10-01 | Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.c | j_mayer |
| 2007-10-01 | Fix missing nip updates for instructions that potentially generate | j_mayer |
| 2007-10-01 | Handle all MMU models in switches, even if it's just to abort because of lack | j_mayer |
| 2007-10-01 | More comments about unimplemented SPRs. | j_mayer |
| 2007-10-01 | Optimisations: avoid generation of duplicated micro-ops. | j_mayer |
| 2007-10-01 | Remove definitions for deprecated SLB & TLB related op helpers. | j_mayer |
| 2007-10-01 | Avoid op helpers that would just call helpers for TLB & SLB management: | j_mayer |
| 2007-10-01 | Share more SPR instanciations between all PowerPC 401 incarnations. | j_mayer |
| 2007-10-01 | Implement embedded PowerPC exceptions prefix and vectors registers. | j_mayer |
| 2007-10-01 | Share input pins and internal interrupt controller between all PowerPC 40x. | j_mayer |
| 2007-09-30 | Fix (once again) PowerPC sync weight field. | j_mayer |
| 2007-09-30 | Fix PowerPC TLB miss dump code. | j_mayer |
| 2007-09-30 | Fix inconsistent end conditions in ppc_find_xxx functions. | j_mayer |
| 2007-09-30 | * Update OEA environment, following the PowerPC 2.04 specification: | j_mayer |
| 2007-09-30 | Synchronize with latest PowerPC ISA VEA: | j_mayer |
| 2007-09-30 | Implement Process Priority Register as defined in the PowerPC 2.04 spec. | j_mayer |
| 2007-09-30 | Implement new floating-point instructions (fre, frin, friz, frip, frim) | j_mayer |
| 2007-09-30 | Improve single-precision floats load & stores: | j_mayer |
| 2007-09-30 | XER is to be treated as a 64 bits register on 64 bits implementations, | j_mayer |
| 2007-09-30 | Implement the PowerPC alternate time-base, following the 2.04 specification. | j_mayer |
