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AgeCommit message (Expand)Author
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost
2015-03-09target-ppc: Fix warnings from SparseStefan Weil
2015-03-09target-ppc: Add versions to server CPU descriptionsAlexey Kardashevskiy
2015-03-09PPC: Introduce the Virtual Time Base (VTB) SPR registerCyril Bur
2015-03-09target-ppc: force update of msr bits in cpu_post_loadMark Cave-Ayland
2015-03-09target-ppc: move sdr1 value change detection logic to helper_store_sdr1()Mark Cave-Ayland
2015-03-09display cpu id dump stateTristan Gingold
2015-03-09target-ppc: Use right page size with hash table lookupAneesh Kumar K.V
2015-02-12tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson
2015-02-12tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell
2015-01-12kvm: extend kvm_irqchip_add_msi_route to work on s390Frank Blaschka
2015-01-10Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell
2015-01-07target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLYPeter Maydell
2015-01-07target-ppc: Introduce Privileged TM NoopsTom Musta
2015-01-07target-ppc: Introduce tcheckTom Musta
2015-01-07target-ppc: Introduce TM NoopsTom Musta
2015-01-07target-ppc: Introduce tbeginTom Musta
2015-01-07target-ppc: Introduce TEXASRU Bit FieldsTom Musta
2015-01-07target-ppc: Power8 Supports Transactional MemoryTom Musta
2015-01-07target-ppc: Introduce tm_enabled Bit to CPU StateTom Musta
2015-01-07target-ppc: Introduce Feature Flag for Transactional MemoryTom Musta
2015-01-07target-ppc: Introduce Instruction Type for Transactional MemoryTom Musta
2015-01-07target-ppc: explicitly save page table headers in big endianCédric Le Goater
2015-01-07target-ppc: Eliminate set_fprf Argument From helper_compute_fprfTom Musta
2015-01-07target-ppc: Eliminate set_fprf Argument From gen_compute_fprfTom Musta
2015-01-07target-ppc: Fully Migrate to gen_set_cr1_from_fpscrTom Musta
2015-01-07target-ppc: mffs. Should Set CR1 from FPSCR BitsTom Musta
2015-01-07target-ppc: Fix Floating Point Move Instructions That Set CR1Tom Musta
2015-01-07target-ppc: VXSQRT Should Not Be Set for NaNsTom Musta
2015-01-07target-ppc: Load/Store Vector Element Storage AlignmentTom Musta
2015-01-03gen-icount: check cflags instead of use_icount globalPaolo Bonzini
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini
2014-12-23target-ppc: pass DisasContext to SPR generator functionsPaolo Bonzini
2014-12-16qemu-log: add log category for MMU infoAntony Pavlov
2014-11-20target-ppc: Altivec's mtvscr Decodes Wrong RegisterTom Musta
2014-11-20target-ppc: Fix breakpoint registers for e300Fabien Chouteau
2014-11-04target-ppc: Fix Altivec Round OpcodesTom Musta
2014-11-04target-ppc: Fix vcmpbfp. Unordered CaseTom Musta
2014-11-04target-ppc: Fix Altivec ShiftsTom Musta
2014-11-04target-ppc: simplify AES emulationAurelien Jarno
2014-11-04ppc: do not look at the MMU index to detect PR/HV modePaolo Bonzini
2014-11-04target-ppc: kvm: Fix memory overflow issue about strncat()Chen Gang
2014-11-04target-ppc: Fix an invalid free in opcode table handling code.Bharata B Rao
2014-11-04target-ppc: Use macros in opcodes table handling codeBharata B Rao
2014-11-04target-ppc : Add new processor type 440x5wDFPUPierre Mallard
2014-11-04target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64Pierre Mallard
2014-11-04target-ppc: Implement IVOR[59] By Default for Book ETom Musta
2014-11-04target-ppc: Fix kvmppc_set_compat to use negotiated cpu-versionAlexey Kardashevskiy
2014-11-04ppc: compute mask from BI using right shiftPaolo Bonzini
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