Age | Commit message (Expand) | Author |
2016-07-01 | ppc: Fix 64K pages support in full emulation | Benjamin Herrenschmidt |
2016-07-01 | ppc: LPCR is a HV resource | Benjamin Herrenschmidt |
2016-07-01 | ppc: Initial HDEC support | Benjamin Herrenschmidt |
2016-07-01 | ppc: Use a helper to filter writes to LPCR | Benjamin Herrenschmidt |
2016-07-01 | ppc: Add a bunch of hypervisor SPRs to Book3s | Benjamin Herrenschmidt |
2016-06-23 | ppc: Add P7/P8 Power Management instructions | Benjamin Herrenschmidt |
2016-06-23 | ppc: Add real mode CI load/store instructions for P7 and P8 | Benjamin Herrenschmidt |
2016-06-23 | ppc: Fix POWER7 and POWER8 exception definitions | Benjamin Herrenschmidt |
2016-06-23 | ppc: define a default LPCR value | Benjamin Herrenschmidt |
2016-06-22 | ppc: Improve emulation of THRM registers | Benjamin Herrenschmidt |
2016-06-14 | ppc: Add PowerISA 2.07 compatibility mode | Thomas Huth |
2016-06-14 | ppc: Improve PCR bit selection in ppc_set_compat() | Thomas Huth |
2016-06-14 | ppc: Split pcr_mask settings into supported bits and the register mask | Thomas Huth |
2016-06-07 | ppc: POWER7 has lq/stq instructions and stq need to check ISA | Benjamin Herrenschmidt |
2016-06-07 | ppc: POWER7 had ACOP and PID registers | Benjamin Herrenschmidt |
2016-06-07 | ppc: Better figure out if processor has HV mode | Benjamin Herrenschmidt |
2016-05-30 | ppc: Add PPC_64H instruction flag to POWER7 and POWER8 | Benjamin Herrenschmidt |
2016-05-27 | PPC/KVM: early validation of vcpu id | Greg Kurz |
2016-05-19 | ppc: use PowerPCCPU instead of CPUPPCState | Paolo Bonzini |
2016-04-05 | ppc: Rework POWER7 & POWER8 exception model | Cédric Le Goater |
2016-03-24 | ppc: move POWER8 Book4 regs in their own routine | Cédric Le Goater |
2016-03-24 | ppc: A couple more dummy POWER8 Book4 regs | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add dummy CIABR SPR | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add POWER8 IAMR register | Benjamin Herrenschmidt |
2016-03-24 | ppc: Fix writing to AMR/UAMOR | Benjamin Herrenschmidt |
2016-03-24 | ppc: Initialize AMOR in PAPR mode | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add dummy SPR_IC for POWER8 | Benjamin Herrenschmidt |
2016-03-24 | ppc: Create cpu_ppc_set_papr() helper | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add a bunch of hypervisor SPRs to Book3s | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add macros to register hypervisor mode SPRs | Benjamin Herrenschmidt |
2016-03-24 | ppc64: set MSR_SF bit | Laurent Vivier |
2016-03-16 | target-ppc: Add PVR for POWER8NVL processor | Alexey Kardashevskiy |
2016-03-16 | ppc: Add a few more P8 PMU SPRs | Benjamin Herrenschmidt |
2016-03-16 | ppc: Fix migration of the TAR SPR | Thomas Huth |
2016-03-16 | ppc: Define the PSPB register on POWER8 | Thomas Huth |
2016-02-08 | qom: Swap 'name' next to visitor in ObjectPropertyAccessor | Eric Blake |
2016-02-08 | qapi: Swap visit_* arguments for consistent 'name' placement | Eric Blake |
2016-01-30 | target-ppc: Allow more page sizes for POWER7 & POWER8 in TCG | David Gibson |
2016-01-30 | target-ppc: gdbstub: Add VSX support | Anton Blanchard |
2016-01-30 | target-ppc: gdbstub: fix spe registers for little-endian guests | Greg Kurz |
2016-01-30 | target-ppc: gdbstub: fix altivec registers for little-endian guests | Greg Kurz |
2016-01-30 | target-ppc: gdbstub: introduce avr_need_swap() | Greg Kurz |
2016-01-30 | target-ppc: gdbstub: fix float registers for little-endian guests | Greg Kurz |
2016-01-30 | ppc: Clean up error handling in ppc_set_compat() | David Gibson |
2016-01-29 | ppc: Clean up includes | Peter Maydell |
2016-01-27 | gdb: provide the name of the architecture in the target.xml | David Hildenbrand |
2016-01-15 | dump: qemunotes aren't commonly needed | Andrew Jones |
2015-11-06 | taget-ppc: Fix read access to IBAT registers higher than IBAT3 | Julio Guerra |
2015-10-23 | ppc/spapr: Add "ibm,pa-features" property to the device-tree | Benjamin Herrenschmidt |
2015-10-23 | ppc: Add mmu_model defines for arch 2.03 and 2.07 | Benjamin Herrenschmidt |