aboutsummaryrefslogtreecommitdiff
path: root/target-ppc/translate_init.c
AgeCommit message (Expand)Author
2009-03-02kvm/powerpc: Add irq support for E500 coreaurel32
2009-02-28Implement HIORblueswir1
2009-02-09target-ppc: Model e500v{1,2} CPUs more accuratelyaurel32
2009-02-09target-ppc: Model SPE floating-point instructions more accuratelyaurel32
2009-02-05targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori
2009-02-03Add calls to initialize VSCR on appropriate machinesaurel32
2009-01-24target-ppc: Add SPE register read/write using XMLaurel32
2009-01-24target-ppc: Add Altivec register read/write using XMLaurel32
2009-01-24target-ppc: Add float register read/write using XMLaurel32
2009-01-24target-ppc: Include gdbstub.haurel32
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel32
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc
2008-12-11target-ppc: rework exception codeaurel32
2008-12-07target-ppc: convert SPR accesses to TCGaurel32
2008-11-16Attached patch fixes a series of this warningblueswir1
2008-10-21target-ppc: Convert XER accesses to TCGaurel32
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir1
2008-09-14ppc: Convert ctr, lr moves to TCGaurel32
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir1
2007-12-10Fix PowerPC 74xx definitions.j_mayer
2007-11-21Fix PowerPC 7xx definitions.j_mayer
2007-11-19Remove shared macro used to define PowerPC implementations instructions sets:j_mayer
2007-11-19PowerPC 620 MMU do not have the same exact behavior as standardj_mayer
2007-11-19New PowerPC CPU flag to define the decrementer and time-base source clock.j_mayer
2007-11-17Improve PowerPC instructions set dump.j_mayer
2007-11-17Add definitions for Freescale PowerPC implementations,j_mayer
2007-11-17Define Freescale cores specific MMU model, exceptions and input bus.j_mayer
2007-11-17A little more granularity in PowerPC instructions definition is neededj_mayer
2007-11-17Make the PowerPC MMU model, exception model and input bus modelj_mayer
2007-11-17Always make all PowerPC exception definitions visible.j_mayer
2007-11-14Reorganize PowerPC instructions categories, add icbi separate case.j_mayer
2007-11-12Add PVR and SPR definition for most embedded PowerPC from Freescale.j_mayer
2007-11-10Allow selection of PowerPC CPU giving a PVR.j_mayer
2007-11-10added cpu_model parameter to cpu_init()bellard
2007-11-04PowerPC 601 need specific callbacks for its BATs setup.j_mayer
2007-11-03Fix PowerPC high BATs access: BAT number was incorrect.j_mayer
2007-11-03PowerPC MMU and exception fixes:j_mayer
2007-10-25Implement power-management for all defined PowerPC CPUs.j_mayer
2007-10-25Allow selection of all defined PowerPC 74xx (aka G4) CPUs.j_mayer
2007-10-14There is no need of a specific MMU model for PowerPC 601.j_mayer
2007-10-08Remove synonymous in PowerPC MSR bits definitions.j_mayer
2007-10-08Real-mode only PowerPC 40x do not have any TLBs.j_mayer
2007-10-08Implement exception prefix feature for PowerPC 601.j_mayer
2007-10-08Add missing exception vectors for PowerPC 7x5.j_mayer
2007-10-07Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls).j_mayer
2007-10-07Reorganize the CPUPPCState structure to group features.j_mayer
2007-10-07Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer
2007-10-05Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.j_mayer
2007-10-05PowerPC hardware reset vector is now considered as part of the exception model.j_mayer
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-30 10:59:18 +0000