aboutsummaryrefslogtreecommitdiff
path: root/target-ppc/translate_init.c
AgeCommit message (Expand)Author
2016-06-14ppc: Add PowerISA 2.07 compatibility modeThomas Huth
2016-06-14ppc: Improve PCR bit selection in ppc_set_compat()Thomas Huth
2016-06-14ppc: Split pcr_mask settings into supported bits and the register maskThomas Huth
2016-06-07ppc: POWER7 has lq/stq instructions and stq need to check ISABenjamin Herrenschmidt
2016-06-07ppc: POWER7 had ACOP and PID registersBenjamin Herrenschmidt
2016-06-07ppc: Better figure out if processor has HV modeBenjamin Herrenschmidt
2016-05-30ppc: Add PPC_64H instruction flag to POWER7 and POWER8Benjamin Herrenschmidt
2016-05-27PPC/KVM: early validation of vcpu idGreg Kurz
2016-05-19ppc: use PowerPCCPU instead of CPUPPCStatePaolo Bonzini
2016-04-05ppc: Rework POWER7 & POWER8 exception modelCédric Le Goater
2016-03-24ppc: move POWER8 Book4 regs in their own routineCédric Le Goater
2016-03-24ppc: A couple more dummy POWER8 Book4 regsBenjamin Herrenschmidt
2016-03-24ppc: Add dummy CIABR SPRBenjamin Herrenschmidt
2016-03-24ppc: Add POWER8 IAMR registerBenjamin Herrenschmidt
2016-03-24ppc: Fix writing to AMR/UAMORBenjamin Herrenschmidt
2016-03-24ppc: Initialize AMOR in PAPR modeBenjamin Herrenschmidt
2016-03-24ppc: Add dummy SPR_IC for POWER8Benjamin Herrenschmidt
2016-03-24ppc: Create cpu_ppc_set_papr() helperBenjamin Herrenschmidt
2016-03-24ppc: Add a bunch of hypervisor SPRs to Book3sBenjamin Herrenschmidt
2016-03-24ppc: Add macros to register hypervisor mode SPRsBenjamin Herrenschmidt
2016-03-24ppc64: set MSR_SF bitLaurent Vivier
2016-03-16target-ppc: Add PVR for POWER8NVL processorAlexey Kardashevskiy
2016-03-16ppc: Add a few more P8 PMU SPRsBenjamin Herrenschmidt
2016-03-16ppc: Fix migration of the TAR SPRThomas Huth
2016-03-16ppc: Define the PSPB register on POWER8Thomas Huth
2016-02-08qom: Swap 'name' next to visitor in ObjectPropertyAccessorEric Blake
2016-02-08qapi: Swap visit_* arguments for consistent 'name' placementEric Blake
2016-01-30target-ppc: Allow more page sizes for POWER7 & POWER8 in TCGDavid Gibson
2016-01-30target-ppc: gdbstub: Add VSX supportAnton Blanchard
2016-01-30target-ppc: gdbstub: fix spe registers for little-endian guestsGreg Kurz
2016-01-30target-ppc: gdbstub: fix altivec registers for little-endian guestsGreg Kurz
2016-01-30target-ppc: gdbstub: introduce avr_need_swap()Greg Kurz
2016-01-30target-ppc: gdbstub: fix float registers for little-endian guestsGreg Kurz
2016-01-30ppc: Clean up error handling in ppc_set_compat()David Gibson
2016-01-29ppc: Clean up includesPeter Maydell
2016-01-27gdb: provide the name of the architecture in the target.xmlDavid Hildenbrand
2016-01-15dump: qemunotes aren't commonly neededAndrew Jones
2015-11-06taget-ppc: Fix read access to IBAT registers higher than IBAT3Julio Guerra
2015-10-23ppc/spapr: Add "ibm,pa-features" property to the device-treeBenjamin Herrenschmidt
2015-10-23ppc: Add mmu_model defines for arch 2.03 and 2.07Benjamin Herrenschmidt
2015-09-11Target-ppc: Remove unnecessary variableShraddha Barke
2015-07-09cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite
2015-07-09target-ppc: Move cpu_exec_init() call to realize functionBharata B Rao
2015-07-09cpu: Add Error argument to cpu_exec_init()Bharata B Rao
2015-03-09PPC: Introduce the Virtual Time Base (VTB) SPR registerCyril Bur
2015-01-10Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell
2015-01-07target-ppc: Power8 Supports Transactional MemoryTom Musta
2015-01-03translate: check cflags instead of use_icount globalPaolo Bonzini
2014-12-23target-ppc: pass DisasContext to SPR generator functionsPaolo Bonzini
2014-11-20target-ppc: Fix breakpoint registers for e300Fabien Chouteau
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-13 16:56:48 +0000