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path: root/target-ppc/translate_init.c
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2009-01-04Update FSF address in GPL/LGPL boilerplateaurel32
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc
Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11target-ppc: rework exception codeaurel32
... also remove two warnings. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5989 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07target-ppc: convert SPR accesses to TCGaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5910 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-16Attached patch fixes a series of this warningblueswir1
when compiling on NetBSD: warning: array subscript has type 'char' Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5727 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-21target-ppc: Convert XER accesses to TCGaurel32
Define XER bits as a single register and access them individually to avoid defining 5 32-bit registers (TCG doesn't permit to map 8-bit registers). Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5500 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20Suppress gcc 4.x -Wpointer-sign (included in -Wall) warningsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14ppc: Convert ctr, lr moves to TCGaurel32
Introduce TCG variables cpu_{ctr,lr} and replace op_{load,store}_{lr,ctr} with tcg_gen_mov_tl. Signed-off-by: Andreas Faerber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5217 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-10Fix PowerPC 74xx definitions.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3798 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-21Fix PowerPC 7xx definitions.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3713 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19Remove shared macro used to define PowerPC implementations instructions sets:j_mayer
tend more to propagate bugged definition than simplify the code. Check and fix PowerPC 6xx implementations definitions. Misc fixes in PowerPC CPU list. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3707 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19PowerPC 620 MMU do not have the same exact behavior as standardj_mayer
64 bits PowerPC ones. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3706 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19New PowerPC CPU flag to define the decrementer and time-base source clock.j_mayer
Use it to properly initialize the clock for the PreP target. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3701 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Improve PowerPC instructions set dump.j_mayer
Remove meaningless define from cpu.h Misc cleanups. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3682 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Add definitions for Freescale PowerPC implementations,j_mayer
ie MPC5xx, MPC8xx, e200, e300, e500 and e600 cores. Make those CPUs and PowerPC 440 available for user-mode emulation, thus providing a way of testing their implementation specific instructions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3681 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Define Freescale cores specific MMU model, exceptions and input bus.j_mayer
(but do not provide any actual implementation). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3680 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17A little more granularity in PowerPC instructions definition is neededj_mayer
in order to implement Freescale cores. Fix efsadd / efssub opcodes. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3679 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Make the PowerPC MMU model, exception model and input bus modelj_mayer
typedefed enums. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3660 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17Always make all PowerPC exception definitions visible.j_mayer
Always make the hypervisor timers available. Remove all TARGET_PPC64H checks, keeping a few if (0) tests for cases that cannot be properly handled with the current PowerPC CPU definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3656 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-14Reorganize PowerPC instructions categories, add icbi separate case.j_mayer
Fix frsqrtes instruction opcode. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3636 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-12Add PVR and SPR definition for most embedded PowerPC from Freescale.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3632 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10Allow selection of PowerPC CPU giving a PVR.j_mayer
Remove unused pvr_mask field from CPU definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3571 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10added cpu_model parameter to cpu_init()bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-04PowerPC 601 need specific callbacks for its BATs setup.j_mayer
Implement PowerPC 601 HID0 register, needed for little-endian mode support. As a consequence, we need to merge hflags coming from MSR with other ones. Use little-endian mode from hflags instead of MSR during code translation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3524 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-03Fix PowerPC high BATs access: BAT number was incorrect.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3519 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-03PowerPC MMU and exception fixes:j_mayer
* PowerPC 601 (and probably POWER/POWER2) uses a different BAT format than later PowerPC implementation. * Bugfix in BATs check: must not stop after 4 BATs when more are provided. * Enable POWER 'rac' instruction. * Fix exception prefix for all supported PowerPC implementations. * Fix exceptions, MMU model and bus model for PowerPC 601 & 620. * Enable PowerPC 620 as it could mostly boot a PreP target. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3518 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-25Implement power-management for all defined PowerPC CPUs.j_mayer
Fix PowerPC 970MP definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3440 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-25Allow selection of all defined PowerPC 74xx (aka G4) CPUs.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3437 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14There is no need of a specific MMU model for PowerPC 601.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Remove synonymous in PowerPC MSR bits definitions.j_mayer
Fix MSR EP bit buggy definition. Remove unuseful MSR flags. Fix MSR bits and flags definitions for most supported PowerPC implementations. Add MSR definitions/flags constistency checks and optional dump. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3354 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Real-mode only PowerPC 40x do not have any TLBs.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3353 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Implement exception prefix feature for PowerPC 601.j_mayer
Fix PowerPC 601 hardware reset vector. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3352 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Add missing exception vectors for PowerPC 7x5.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3351 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls).j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3350 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Reorganize the CPUPPCState structure to group features.j_mayer
Add #ifdef to avoid compiling not relevant resources: - MMU related stuff for user-mode only targets - PowerPC 64 only resources for PowerPC 32 targets - embedded PowerPC extensions for non-ppcemb targets. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3343 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer
As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer
memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3335 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-05Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-05PowerPC hardware reset vector is now considered as part of the exception model.j_mayer
Use it at CPU initialisation time. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-04More cache tuning fixes:j_mayer
* fix the tunable cache line size probe for PowerPC 970. * initialize HID5 so cache line is 32 bytes long when running in user-mode only git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-04Make PowerPC cache line size implementation dependant.j_mayer
Implement dcbz tunable cache line size for PowerPC 970. Make hardware reset vector implementation dependant. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03HID0 is a write-clear register on 970 (DBSR).j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3320 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03We never have to export ppc_set_irq.j_mayer
Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01More comments about unimplemented SPRs.j_mayer
Tag unused functions with unused attribute instead of using #ifdef (TODO) to ease tests: just have to enable the implementation in the cpu_defs table. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3306 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Share more SPR instanciations between all PowerPC 401 incarnations.j_mayer
Add comments about some unimplemented storage control dedicated SPRs. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3301 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Implement embedded PowerPC exceptions prefix and vectors registers.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3300 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Share input pins and internal interrupt controller between all PowerPC 40x.j_mayer
Fix critical input interrupt generation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3299 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30Fix inconsistent end conditions in ppc_find_xxx functions.j_mayer
(crash reported by Andreas Farber when using default CPU). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3293 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30Implement the PowerPC alternate time-base, following the 2.04 specification.j_mayer
Share most code with the time-base management routines. Remove time-base write routines from user-mode emulation environments. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3277 c046a42c-6fe2-441c-8c8c-71466251a162
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