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path: root/target-ppc/translate.c
AgeCommit message (Expand)Author
2014-06-16target-ppc: Introduce DFP Shift SignificandTom Musta
2014-06-16target-ppc: Introduce DFP Insert Biased ExponentTom Musta
2014-06-16target-ppc: Introduce DFP Extract Biased ExponentTom Musta
2014-06-16target-ppc: Introduce DFP Encode BCD to DPDTom Musta
2014-06-16target-ppc: Introduce DFP Decode DPD to BCDTom Musta
2014-06-16target-ppc: Introduce DFP Convert to FixedTom Musta
2014-06-16target-ppc: Introduce DFP Convert to FixedTom Musta
2014-06-16target-ppc: Introduce Round to DFP Short/LongTom Musta
2014-06-16target-ppc: Introduce DFP Convert to Long/ExtendedTom Musta
2014-06-16target-ppc: Introduce DFP Round to IntegerTom Musta
2014-06-16target-ppc: Introduce DFP ReroundTom Musta
2014-06-16target-ppc: Introduce DFP QuantizeTom Musta
2014-06-16target-ppc: Introduce DFP Test SignificanceTom Musta
2014-06-16target-ppc: Introduce DFP Test ExponentTom Musta
2014-06-16target-ppc: Introduce DFP Test Data GroupTom Musta
2014-06-16target-ppc: Introduce DFP Test Data ClassTom Musta
2014-06-16target-ppc: Introduce DFP ComparesTom Musta
2014-06-16target-ppc: Introduce DFP DivideTom Musta
2014-06-16target-ppc: Introduce DFP MultiplyTom Musta
2014-06-16target-ppc: Introduce DFP SubtractTom Musta
2014-06-16target-ppc: Introduce DFP AddTom Musta
2014-06-16target-ppc: Introduce Decoder Macros for DFPTom Musta
2014-06-16target-ppc: Introduce Generator Macros for DFP Arithmetic FormsTom Musta
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber
2014-03-05target-ppc: Use Additional Temporary in stqcx CaseTom Musta
2014-03-05target-ppc/translate.c: Use ULL suffix for 64 bit constantsPeter Maydell
2014-03-05target-ppc: Altivec 2.07: Vector Permute and Exclusive ORTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector SHA Sigma InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: AES InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta
2014-03-05target-ppc: Altivec 2.07: Doubleword ComparesTom Musta
2014-03-05target-ppc: Altivec 2.07: vbpermq InstructionTom Musta
2014-03-05target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Merge InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta
2014-03-05target-ppc: Altivec 2.07: vmuluw InstructionTom Musta
2014-03-05target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta
2014-03-05target-ppc: Altivec 2.07: Vector Logical InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Add Support for R-Form Dual InstructionsTom Musta
2014-03-05target-ppc: Altivec 2.07: Add Opcode Macro for VX Form InstructionsTom Musta
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