| Age | Commit message (Expand) | Author |
|---|
| 2016-03-24 | ppc: Add macros to register hypervisor mode SPRs | Benjamin Herrenschmidt |
| 2016-03-01 | tcg: Add type for vCPU pointers | Lluís Vilanova |
| 2016-02-17 | target-ppc: Include missing MMU models for SDR1 in info registers | David Gibson |
| 2016-02-09 | tcg: Change tcg_global_mem_new_* to take a TCGv_ptr | Richard Henderson |
| 2016-02-03 | log: do not unnecessarily include qom/cpu.h | Paolo Bonzini |
| 2016-02-01 | target-ppc: mcrfs should always update FEX/VX and only clear exception bits | James Clarke |
| 2016-01-30 | target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one() | David Gibson |
| 2016-01-29 | ppc: Clean up includes | Peter Maydell |
| 2015-12-17 | ppc: cleanup logging | Paolo Bonzini |
| 2015-12-17 | qemu-log: introduce qemu_log_separate | Paolo Bonzini |
| 2015-11-12 | PPC: Allow Rc bit to be set on mtspr | Alexander Graf |
| 2015-10-28 | target-*: Advance pc after recognizing a breakpoint | Richard Henderson |
| 2015-10-23 | ppc: Add mmu_model defines for arch 2.03 and 2.07 | Benjamin Herrenschmidt |
| 2015-10-07 | tcg: Remove gen_intermediate_code_pc | Richard Henderson |
| 2015-10-07 | tcg: Pass data argument to restore_state_to_opc | Richard Henderson |
| 2015-10-07 | tcg: Add TCG_MAX_INSNS | Richard Henderson |
| 2015-10-07 | target-*: Introduce and use cpu_breakpoint_test | Richard Henderson |
| 2015-10-07 | target-*: Increment num_insns immediately after tcg_gen_insn_start | Richard Henderson |
| 2015-10-07 | target-*: Unconditionally emit tcg_gen_insn_start | Richard Henderson |
| 2015-10-07 | tcg: Rename debug_insn_start to insn_start | Richard Henderson |
| 2015-09-20 | target-ppc: fix xscmpodp and xscmpudp decoding | Aurelien Jarno |
| 2015-06-22 | disas: Remove uses of CPU env | Peter Crosthwaite |
| 2015-03-13 | tcg: Change translator-side labels to a pointer | Richard Henderson |
| 2015-03-09 | display cpu id dump state | Tristan Gingold |
| 2015-02-12 | tcg: Introduce tcg_op_buf_count and tcg_op_buf_full | Richard Henderson |
| 2015-02-12 | tcg: Move emit of INDEX_op_end into gen_tb_end | Richard Henderson |
| 2015-01-10 | Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int... | Peter Maydell |
| 2015-01-07 | target-ppc: Mark SR() and gen_sync_exception() as !CONFIG_USER_ONLY | Peter Maydell |
| 2015-01-07 | target-ppc: Introduce Privileged TM Noops | Tom Musta |
| 2015-01-07 | target-ppc: Introduce tcheck | Tom Musta |
| 2015-01-07 | target-ppc: Introduce TM Noops | Tom Musta |
| 2015-01-07 | target-ppc: Introduce tbegin | Tom Musta |
| 2015-01-07 | target-ppc: Introduce tm_enabled Bit to CPU State | Tom Musta |
| 2015-01-07 | target-ppc: Eliminate set_fprf Argument From helper_compute_fprf | Tom Musta |
| 2015-01-07 | target-ppc: Eliminate set_fprf Argument From gen_compute_fprf | Tom Musta |
| 2015-01-07 | target-ppc: Fully Migrate to gen_set_cr1_from_fpscr | Tom Musta |
| 2015-01-07 | target-ppc: mffs. Should Set CR1 from FPSCR Bits | Tom Musta |
| 2015-01-07 | target-ppc: Fix Floating Point Move Instructions That Set CR1 | Tom Musta |
| 2015-01-07 | target-ppc: Load/Store Vector Element Storage Alignment | Tom Musta |
| 2015-01-03 | gen-icount: check cflags instead of use_icount global | Paolo Bonzini |
| 2014-12-23 | target-ppc: pass DisasContext to SPR generator functions | Paolo Bonzini |
| 2014-11-20 | target-ppc: Altivec's mtvscr Decodes Wrong Register | Tom Musta |
| 2014-11-04 | target-ppc: Fix Altivec Round Opcodes | Tom Musta |
| 2014-11-04 | ppc: do not look at the MMU index to detect PR/HV mode | Paolo Bonzini |
| 2014-11-04 | target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64 | Pierre Mallard |
| 2014-11-04 | ppc: compute mask from BI using right shift | Paolo Bonzini |
| 2014-11-04 | ppc: rename gen_set_cr6_from_fpscr | Paolo Bonzini |
| 2014-09-08 | target-ppc: Implement mulldo with TCG | Tom Musta |
| 2014-09-08 | target-ppc: Clean up mullwo | Tom Musta |
| 2014-09-08 | target-ppc: Clean Up mullw | Tom Musta |
