aboutsummaryrefslogtreecommitdiff
path: root/target-ppc/translate.c
AgeCommit message (Expand)Author
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
2012-08-28target-ppc: fix altivec instructionsAurelien Jarno
2012-06-24target-ppc: Fix build with --enable-debugStefan Weil
2012-06-24PPC: Add support for MSR_CMAlexander Graf
2012-06-24ppc: Move load and store helpers, switch to AREG0 free modeBlue Swirl
2012-06-24ppc: Avoid AREG0 for misc helpersBlue Swirl
2012-06-24ppc: Avoid AREG0 for timebase helpersBlue Swirl
2012-06-24ppc: Avoid AREG0 for MMU etc. helpersBlue Swirl
2012-06-24ppc: Avoid AREG0 for integer and vector helpersBlue Swirl
2012-06-24ppc: Avoid AREG0 for FPU and SPE helpersBlue Swirl
2012-06-24ppc: Avoid AREG0 for exception helpersBlue Swirl
2012-04-15target-ppc: QOM'ify CPU resetAndreas Färber
2012-03-15PPC: KVM: Synchronize regs on CPU dumpAlexander Graf
2012-03-15PPC64: Add support for ldbrx and stdbrx instructionsThomas Huth
2012-03-14target-ppc: Don't overuse CPUStateAndreas Färber
2012-02-28target-ppc: Clean includesStefan Weil
2012-02-02PPC: E500: Implement msgsndAlexander Graf
2012-02-02PPC: E500: Implement msgclrAlexander Graf
2012-02-02PPC: booke206: Check for TLB overrunAlexander Graf
2012-02-02PPC: booke206: Implement tlbilxAlexander Graf
2012-02-02PPC: rename msync to msync_4xxAlexander Graf
2012-02-02PPC: e500: msync is 440 only, e500 has real syncAlexander Graf
2011-11-11PPC: Fix for the gdb single step problem on an rfi instructionSebastian Bauer
2011-10-30Set an invalid-bits mask for each SPE instructionsFabien Chouteau
2011-10-06Implement POWER7's CFAR in TCGDavid Gibson
2011-08-23PPC: E500: Inject SPE exception on invalid SPE accessAlexander Graf
2011-07-01Merge branch 'ppc-next' of git://repo.or.cz/qemu/agrafBlue Swirl
2011-06-26Remove exec-all.h include directivesBlue Swirl
2011-06-17PPC: Only set lower 32bits with mtmsrAlexander Graf
2011-06-03target-ppc: remove old CONFIG_SOFTFLOAT #ifdefAurelien Jarno
2011-05-12PPC: Implement e500 (FSL) MMUAlexander Graf
2011-05-12PPC: Add another 64 bits to instruction feature maskAlexander Graf
2011-05-09monitor: add PPC BookE SPRsScott Wood
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil
2011-04-01Parse SDR1 on mtspr instead of at translate timeDavid Gibson
2011-04-01Correct ppc popcntb logic, implement popcntw and popcntdDavid Gibson
2011-04-01Implement PowerPC slbmfee and slbmfev instructionsDavid Gibson
2011-04-01target-ppc: ext32u instead of andi with constantAurelien Jarno
2011-03-22target-ppc: add support for 6 SPE instructionsFabien Chouteau
2011-01-21ppc: Correct BookE tlb readsEdgar E. Iglesias
2010-12-31Fix translation of unary PPC/SPE instructions (efdneg etc.).Mike Pall
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil
2010-09-15PPC: Enable hint bits for lwarx/ldarxAlexander Graf
2010-07-13target-ppc: add vexptefp instructionAurelien Jarno
2010-05-22Fix %lld or %llx printf format useBlue Swirl
2010-05-05target-ppc: Remove duplicate cpu log.Richard Henderson
2010-04-25ppc: remove dead assignments, spotted by clang analyzerBlue Swirl
2010-04-18PPC: avoid function pointer type mismatch, spotted by clangBlue Swirl
2010-03-11target-ppc: fix evsrwu and evsrws (second try)Aurelien Jarno
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-03 22:10:42 +0000