| Age | Commit message (Expand) | Author |
|---|
| 2008-11-01 | target-ppc: convert 405 MAC instructions to TCG | aurel32 |
| 2008-11-01 | target-ppc: convert arithmetic functions to TCG | aurel32 |
| 2008-10-27 | target-ppc: convert rotation instructions to TCG | aurel32 |
| 2008-10-21 | target-ppc: convert branch related instructions to TCG | aurel32 |
| 2008-10-21 | target-ppc: convert logical instructions to TCG | aurel32 |
| 2008-10-21 | target-ppc: convert crf related instructions to TCG | aurel32 |
| 2008-10-21 | target-ppc: Convert XER accesses to TCG | aurel32 |
| 2008-10-15 | PPC: convert SPE logical instructions to TCG | aurel32 |
| 2008-10-14 | PPC: convert effective address computation to TCG | aurel32 |
| 2008-10-01 | target-ppc: fix computation of XER.{CA, OV} in addme, subfme | aurel32 |
| 2008-10-01 | target-ppc: fix mullw/mullwo | aurel32 |
| 2008-09-14 | ppc: Convert op_andi to TCG | aurel32 |
| 2008-09-14 | ppc: Convert ctr, lr moves to TCG | aurel32 |
| 2008-09-05 | ppc: Convert op_subf to TCG | aurel32 |
| 2008-09-05 | ppc: Convert op_add, op_addi to TCG | aurel32 |
| 2008-09-04 | ppc: replace op_set_FT0 with tcg_gen_movi_i64 | aurel32 |
| 2008-09-04 | ppc: Convert nip moves to TCG | aurel32 |
| 2008-09-04 | ppc: Convert CRF moves to TCG | aurel32 |
| 2008-09-04 | ppc: Convert FPR moves to TCG | aurel32 |
| 2008-09-02 | [ppc] Convert op_moven_T2_T0 to TCG | aurel32 |
| 2008-09-02 | [ppc] Convert op_reset_T0, op_set_{T0, T1} to TCG | aurel32 |
| 2008-09-02 | [ppc] Convert op_move_{T1,T2}_T0 to TCG | aurel32 |
| 2008-08-24 | Revert commits 5082 and 5083 | aurel32 |
| 2008-08-24 | PPC: Switch a few instructions to TCG | aurel32 |
| 2008-04-07 | Revert revisions r4168 and r4169. That's work in progress, not ready for trun... | aurel32 |
| 2008-04-07 | Always enable precise emulation when softfloat is used | aurel32 |
| 2008-03-13 | Use float32/64 instead of float/double | aurel32 |
| 2008-02-01 | use the TCG code generator | bellard |
| 2007-11-16 | Always make PowerPC hypervisor mode memory accesses and instructions | j_mayer |
| 2007-11-12 | Allow use of SPE extension by all PowerPC targets, | j_mayer |
| 2007-11-12 | More PowerPC target -1 usage fixes (reservation address). | j_mayer |
| 2007-11-12 | Fix usage of the -1 constant in the PowerPC target code: | j_mayer |
| 2007-11-11 | Fix POWER abs & abso computation. | j_mayer |
| 2007-11-11 | Optimize PowerPC overflow flag computation in most useful cases. | j_mayer |
| 2007-11-04 | PowerPC 601 need specific callbacks for its BATs setup. | j_mayer |
| 2007-10-31 | Fix CR ops with complement, thanks to Julian Seward for testing | j_mayer |
| 2007-10-28 | Make Alpha and PowerPC targets use shared helpers | j_mayer |
| 2007-10-27 | Fix PowerPC FPSCR update and floating-point exception generation | j_mayer |
| 2007-10-25 | Use host-utils for PowerPC 64 64x64 bits multiplications. | j_mayer |
| 2007-10-25 | Gprof prooved the PowerPC emulation spent too much time in MSR load and store | j_mayer |
| 2007-10-14 | Generate micro-ops for PowerPC hypervisor mode. | j_mayer |
| 2007-10-07 | PowerPC target coding style fixes. | j_mayer |
| 2007-10-05 | Full implementation of PowerPC 64 MMU, just missing support for 1 TB | j_mayer |
| 2007-10-01 | Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulator | j_mayer |
| 2007-10-01 | Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.c | j_mayer |
| 2007-10-01 | Handle all MMU models in switches, even if it's just to abort because of lack | j_mayer |
| 2007-10-01 | Avoid op helpers that would just call helpers for TLB & SLB management: | j_mayer |
| 2007-10-01 | Implement embedded PowerPC exceptions prefix and vectors registers. | j_mayer |
| 2007-09-30 | * Update OEA environment, following the PowerPC 2.04 specification: | j_mayer |
| 2007-09-30 | Implement Process Priority Register as defined in the PowerPC 2.04 spec. | j_mayer |
