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QEMU is a generic and open source machine & userspace emulator and virtualizer
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int_helper.c
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Author
2014-11-04
ppc: fix result of DLMZB when no zero bytes are found
Paolo Bonzini
2014-11-04
ppc: use CRF_* in int_helper.c
Paolo Bonzini
2014-09-08
target-ppc: Implement mulldo with TCG
Tom Musta
2014-09-08
target-ppc: Bug Fix: srad
Tom Musta
2014-09-08
target-ppc: Bug Fix: mulldo OV Detection
Tom Musta
2014-06-16
target-ppc: Refactor AES Instructions
Tom Musta
2014-05-28
tcg: Invert the inclusion of helper.h
Richard Henderson
2014-03-19
target-ppc: Add missing 'static' and 'const' attributes
Stefan Weil
2014-03-15
misc: Fix typos in comments
Stefan Weil
2014-03-05
target-ppc: Altivec 2.07: Vector Permute and Exclusive OR
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Vector SHA Sigma Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: AES Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Binary Coded Decimal Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Vector Polynomial Multiply Sum
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Vector Gather Bits by Bytes
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Doubleword Compares
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: vbpermq Instruction
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Quadword Addition and Subtracation
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and Shifts
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Unpack Signed Word Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Pack Doubleword Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Vector Min/Max Doubleword Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Vector Population Count Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Add Vector Count Leading Zeroes
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: vmuluw Instruction
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Multiply Even/Odd Word Instructions
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit Integers
Tom Musta
2014-03-05
target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword Modulo
Tom Musta
2014-03-05
target-ppc: Add ISA 2.06 divwe[o] Instructions
Tom Musta
2014-03-05
target-ppc: Add ISA 2.06 divweu[o] Instructions
Tom Musta
2014-03-05
target-ppc: Add ISA2.06 divde[o] Instructions
Tom Musta
2014-03-05
target-ppc: Add ISA2.06 divdeu[o] Instructions
Tom Musta
2014-03-05
target-ppc: Add ISA2.06 bpermd Instruction
Tom Musta
2013-04-26
target-ppc: emulate cmpb instruction
Aurelien Jarno
2013-02-23
target-ppc: Split out SO, OV, CA fields from XER
Richard Henderson
2013-02-23
target-ppc: Use mul*2 in mulh* insns
Richard Henderson
2012-12-19
misc: move include files to include/qemu/
Paolo Bonzini
2012-10-04
target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macros
Aurelien Jarno
2012-10-04
target-ppc: use the softfloat float32_muladd function
Aurelien Jarno
2012-10-04
target-ppc: use the softfloat min/max functions
Aurelien Jarno
2012-10-04
target-ppc: simplify NaN propagation for vector functions
Aurelien Jarno
2012-06-24
ppc: Make hbrev table const
Blue Swirl
2012-06-24
ppc: Avoid AREG0 for integer and vector helpers
Blue Swirl
2012-06-24
ppc: Split integer and vector ops
Blue Swirl