| Age | Commit message (Expand) | Author |
|---|
| 2016-07-01 | ppc: Enforce setting MSR:EE,IR and DR when MSR:PR is set | Benjamin Herrenschmidt |
| 2016-06-07 | ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash mode | Benjamin Herrenschmidt |
| 2016-06-07 | ppc: Properly tag the translation cache based on MMU mode | Benjamin Herrenschmidt |
| 2016-06-07 | ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV | Benjamin Herrenschmidt |
| 2016-05-30 | ppc: Do some batching of TCG tlb flushes | Benjamin Herrenschmidt |
| 2016-05-30 | ppc: Use split I/D mmu modes to avoid flushes on interrupts | Benjamin Herrenschmidt |
| 2014-04-08 | PPC: Only enter MSR_POW when no interrupts pending | Alexander Graf |
| 2014-03-13 | cputlb: Change tlb_flush() argument to CPUState | Andreas Färber |
| 2013-12-20 | PPC: Add VSX to hflags | Alexander Graf |
| 2013-03-12 | cpu: Move halted and interrupt_request fields to CPUState | Andreas Färber |
| 2009-08-16 | Replace always_inline with inline | Blue Swirl |
| 2009-07-16 | Update to a hopefully more future proof FSF address | Blue Swirl |
| 2009-01-04 | Update FSF address in GPL/LGPL boilerplate | aurel32 |
| 2008-10-21 | target-ppc: Convert XER accesses to TCG | aurel32 |
| 2008-09-04 | ppc: cleanup register types | aurel32 |
| 2007-11-17 | PowerPC hypervisor mode is not fundamentally available only for PowerPC 64. | j_mayer |
| 2007-11-17 | Always make all PowerPC exception definitions visible. | j_mayer |
| 2007-11-04 | PowerPC 601 need specific callbacks for its BATs setup. | j_mayer |
| 2007-10-25 | Implement power-management for all defined PowerPC CPUs. | j_mayer |
| 2007-10-25 | Gprof prooved the PowerPC emulation spent too much time in MSR load and store | j_mayer |
