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path: root/target-ppc/helper.c
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2007-10-25Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer
routines. Coming back to a raw MSR storage model then speed-up the emulation. Improve fast MSR updates (wrtee wrteei and mtriee cases). Share rfi family instructions helpers code to avoid bug in duplicated code. Allow entering halt mode as the result of a rfi instruction. Add a new helper_regs.h file to avoid duplication of special registers manipulation routines (currently XER and MSR). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3436 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Properly implement non-execute bit on PowerPC segments and PTEs.j_mayer
Fix page protection bits for PowerPC 64 MMU. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3395 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14There is no need of a specific MMU model for PowerPC 601.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Implement PowerPC 64 SLB invalidation helpers.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3391 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Do not allow PowerPC CPU restart after entering checkstop mode.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3388 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Remove synonymous in PowerPC MSR bits definitions.j_mayer
Fix MSR EP bit buggy definition. Remove unuseful MSR flags. Fix MSR bits and flags definitions for most supported PowerPC implementations. Add MSR definitions/flags constistency checks and optional dump. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3354 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Real-mode only PowerPC 40x do not have any TLBs.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3353 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Implement exception prefix feature for PowerPC 601.j_mayer
Fix PowerPC 601 hardware reset vector. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3352 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07PowerPC target coding style fixes.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07PowerPC target optimisations: make intensive use of always_inline.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer
As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer
memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3335 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-05PowerPC hardware reset vector is now considered as part of the exception model.j_mayer
Use it at CPU initialisation time. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03Enable PowerPC 64 MMU model and exceptions.j_mayer
Cleanups in MMU exceptions generation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3319 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03Fix PowerPC initialisation and first reset:j_mayer
reset must occur after we defined the CPU features. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3317 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03We never have to export ppc_set_irq.j_mayer
Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.cj_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3311 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Handle all MMU models in switches, even if it's just to abort because of lackj_mayer
of supporting code. Implement 74xx software TLB model. Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss on those processors. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3307 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Avoid op helpers that would just call helpers for TLB & SLB management:j_mayer
call the helpers directly from the micro-ops. Avoid duplicated code for tlbsx. implementation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3302 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30Fix PowerPC TLB miss dump code.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3295 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30XER is to be treated as a 64 bits register on 64 bits implementations,j_mayer
according to the PowerPC 2.04 specification. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3279 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29Rework PowerPC exceptions model to make it more versatile:j_mayer
* don't use exception vectors as the exception number. Use vectors numbers as defined in the PowerPC embedded specification instead and extend this model to cover all emulated PowerPC variants exceptions. * add some missing exceptions definitions, from PowerPC 2.04 specification and actual PowerPC implementations. * add code provision for hypervisor exceptions handling. * define exception vectors and prefix in CPUPPCState to emulate BookE exception vectors without any hacks. * define per CPU model valid exception vectors. * handle all known exceptions in user-mode only emulations. * fix hardware interrupts priorities in most cases. * change RET_EXCP macros name into GEN_EXCP as they don't return. * do not stop translation on most instructions that are not defined as context-synchronizing in PowerPC specification. * fix PowerPC 64 jump targets and link register update when in 32 bits mode. * Fix PowerPC 464 and 464F definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3261 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-26Great rework and cleanups to ease PowerPC implementations definitions.j_mayer
* cleanup cpu.h, removing definitions used only in translate.c/translate_init.c * add new flags to define instructions sets more precisely * various changes in MMU models definitions * add definitions for PowerPC 440/460 support (insns and SPRs). * add definitions for PowerPC 401/403 and 620 input pins model * Fix definitions for most PowerPC 401, 403, 405, 440, 601, 602, 603 and 7x0 * Preliminary support for PowerPC 74xx (aka G4) without altivec. * Code provision for other PowerPC support (7x5, 970, ...). * New SPR and PVR defined, from PowerPC 2.04 specification and other sources * Misc code bugs, error messages and styles fixes. * Update status files for PowerPC cores support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3244 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21Avoid compilation warnings on 32 bits hosts.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3203 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21More PowerPC definitions, from POWER 2.04 specifications and misc sources.j_mayer
Check that at least instructions set and SPRs are correct for PowerPC 401, 403, 405 and 440 cores. Implement PowerPC 401 MMU model (real-mode only). Improve INSNs and SPRs dump to ease parse with standard shell tools. Add more precise status for most PowerPC cores families. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3201 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21Make CPU hflags be a masked version of the PowerPC MSR.j_mayer
As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-19Code provision for PowerPC BookE MMU model support.j_mayer
Better MSR flags initialisation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3189 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-19Code provision for PowerPC 64 MMU model support.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3186 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17Coding style fixes in PowerPC related code (no functional change):j_mayer
- avoid useless blanks at EOL. - avoid tabs. - fix wrapping lines on 80 chars terminals. - add missing ';' at macros EOL to avoid confusing auto-identers. - fix identation. - Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3178 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in ↵ths
the regex. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-12Fix crash in set registers in PPC gdb-stub, by Jason Wessel.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3079 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24Improve PowerPC 405 MMU model / share more code for other embedded targetsj_mayer
support. Fix PowerPC 405 MSR mask. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2717 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-19No functional changes:j_mayer
- compilation warning fixes - make loglevel tests consistent - use cpu_abort instead of printf(...); exit git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2706 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16PowerPC 4xx software driven TLB fixes + debug traces.j_mayer
Add code provision for more MMU models support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2683 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16Add reset callbacks for PowerPC CPU.j_mayer
Move cpu_ppc_init, cpu_ppc_close, cpu_ppc_reset and ppc_tlb_invalidate into helper.c as they are to be called from outside of the translated code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2682 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16Add bus model (or input pins) into PowerPC CPU flags.j_mayer
Add PowerPC 970 bus and exceptions model. Add code provision for PowerPC 970 instanciation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2680 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16Fix a lot of debug traces for PowerPC emulation: use logfile instead of stdoutj_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2677 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-14Fix miscellaneous display warnings for PowerPC & alpha targetsj_mayer
and parallel CFI flash driver. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2661 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09Implement embedded IRQ controller for PowerPC 6xx/740 & 750.j_mayer
Fix PowerPC external interrupt input handling and lowering. Fix OpenPIC output pins management. Fix multiples bugs in OpenPIC IRQ management. Fix OpenPIC CPU(s) reset function. Fix Mac99 machine to properly route OpenPIC outputs to the PowerPC input pins. Fix PREP machine to properly route i8259 output to the PowerPC external interrupt pin. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2647 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07cpu_get_phys_page_debug should return target_phys_addr_tj_mayer
instead of target_ulong to be consistent. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31Support for PowerPC BookE exception model.j_mayer
No need to requeue timer exceptions. Fix nip saving for 64 bits PowerPC. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2556 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31Merge PowerPC 405 MMU model.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2554 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31As embedded PowerPC TLB model is very different from PowerPC 6xx ones,j_mayer
define ppc_tlb_t as an union of the two. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2553 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30New model for PowerPC CPU hardware interrupt events:j_mayer
move all PowerPC specific code into target-ppc/helper.c to avoid polluting the common code in cpu-exec.c. This makes implementation of new features (ie embedded PowerPC timers, critical interrupts, ...) easier. This also avoid hardcoding the IRQ callback in the OpenPIC controller, making it more easily reusable and allowing cascading. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23Add missing PowerPC 64 instructionsj_mayer
PowerPC 64 fixes. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2530 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23Fix debug printf: we need different macros for target_ulong printsj_mayer
and GPR ones, as the lengths can be different. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2529 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-17Make it safe to use 64 bits GPR and/or 64 bits host registers.j_mayer
For "symetry", add 64 bits versions of all modified functions. As a side effect, add a lot of code provision for PowerPC 64 support. Move overflow and carry checks in common routines for simple cases. Add isel and popcntb instructions from PowerPC 2.03 specification. Remove remaining micro-operations helpers prototypes from op.c. Fix XER_BC field to be 7 bits long. Add power management support for PowerPC 603 & 604. Fix compilation warnings. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2482 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-07Great PowerPC emulation code resynchronisation and improvments:j_mayer
- Add status file to make regression tracking easier - Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c - Update copyrights - Add new / missing PowerPC CPU definitions - Add definitions for PowerPC BookE - Add support for PowerPC 6xx/7xx software driven TLBs Allow use of PowerPC 603 as an example - Add preliminary code for POWER, POWER2, PowerPC 403, 405, 440, 601, 602 and BookE support - Avoid compiling priviledged only resources support for user-mode emulation - Remove unused helpers / micro-ops / dead code - Add instructions usage statistics dump: useful to figure which instructions need strong optimizations. - Micro-operation fixes: * add missing RETURN in some micro-ops * fix prototypes * use softfloat routines for all floating-point operations * fix tlbie instruction * move some huge micro-operations into helpers - emulation fixes: * fix inverted opcodes for fcmpo / fcmpu * condition register update is always to be done after the whole instruction has completed * add missing NIP updates when calling helpers that may generate an exception - optimizations and improvments: * optimize very often used instructions (li, mr, rlwixx...) * remove specific micro-ops for rarely used instructions * add routines for addresses computations to avoid bugs due to multiple different implementations * fix TB linking: do not reset T0 at the end of every TB. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2473 c046a42c-6fe2-441c-8c8c-71466251a162
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