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path: root/target-ppc/cpu.h
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2007-11-12PowerPC SPE extension fix: must always preserve GPR high bits whenj_mayer
running in 32 bits mode. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3631 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-12Allow use of SPE extension by all PowerPC targets,j_mayer
adding gprh registers to store GPR MSBs when GPRs are 32 bits. Remove not-needed-anymore ppcemb-linux-user target. Keep ppcemb-softmmu target, which provides 1kB pages support and 36 bits physical address space. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3628 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10Allow selection of PowerPC CPU giving a PVR.j_mayer
Remove unused pvr_mask field from CPU definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3571 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-10added cpu_model parameter to cpu_init()bellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-04PowerPC 601 need specific callbacks for its BATs setup.j_mayer
Implement PowerPC 601 HID0 register, needed for little-endian mode support. As a consequence, we need to merge hflags coming from MSR with other ones. Use little-endian mode from hflags instead of MSR during code translation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3524 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-03PowerPC MMU and exception fixes:j_mayer
* PowerPC 601 (and probably POWER/POWER2) uses a different BAT format than later PowerPC implementation. * Bugfix in BATs check: must not stop after 4 BATs when more are provided. * Enable POWER 'rac' instruction. * Fix exception prefix for all supported PowerPC implementations. * Fix exceptions, MMU model and bus model for PowerPC 601 & 620. * Enable PowerPC 620 as it could mostly boot a PreP target. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3518 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-27Fix PowerPC FPSCR update and floating-point exception generationj_mayer
in most useful cases. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3458 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-25Add PowerPC power-management state check callback.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3441 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-25Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer
routines. Coming back to a raw MSR storage model then speed-up the emulation. Improve fast MSR updates (wrtee wrteei and mtriee cases). Share rfi family instructions helpers code to avoid bug in duplicated code. Allow entering halt mode as the result of a rfi instruction. Add a new helper_regs.h file to avoid duplication of special registers manipulation routines (currently XER and MSR). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3436 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Properly implement non-execute bit on PowerPC segments and PTEs.j_mayer
Fix page protection bits for PowerPC 64 MMU. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3395 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Merge PowerPC 620 input bus definitions with standard PowerPC 6xx.j_mayer
Avoid hardcoding PowerPC interrupts definitions to ease updates. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3393 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14There is no need of a specific MMU model for PowerPC 601.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-12Unify '-cpu ?' option.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-08Remove synonymous in PowerPC MSR bits definitions.j_mayer
Fix MSR EP bit buggy definition. Remove unuseful MSR flags. Fix MSR bits and flags definitions for most supported PowerPC implementations. Add MSR definitions/flags constistency checks and optional dump. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3354 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3349 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07PowerPC target coding style fixes.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Reorganize the CPUPPCState structure to group features.j_mayer
Add #ifdef to avoid compiling not relevant resources: - MMU related stuff for user-mode only targets - PowerPC 64 only resources for PowerPC 32 targets - embedded PowerPC extensions for non-ppcemb targets. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3343 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-07Add MSR bits signification per PowerPC implementation flags (to be continued).j_mayer
As a side effect, single step and branch step are available again. Remove irrelevant MSR bits definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-05Full implementation of PowerPC 64 MMU, just missing support for 1 TBj_mayer
memory segments. Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead. Make SLB area size implementation dependant. Improve TLB & SLB search debug traces. Temporary hack to make PowerPC 970 boot from ROM instead of RAM. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3335 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-05Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-04Make PowerPC cache line size implementation dependant.j_mayer
Implement dcbz tunable cache line size for PowerPC 970. Make hardware reset vector implementation dependant. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-03We never have to export ppc_set_irq.j_mayer
Protect PowerPC 64 only features with #ifdef (TARGET_PPC64) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.cj_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3311 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Avoid op helpers that would just call helpers for TLB & SLB management:j_mayer
call the helpers directly from the micro-ops. Avoid duplicated code for tlbsx. implementation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3302 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01Share input pins and internal interrupt controller between all PowerPC 40x.j_mayer
Fix critical input interrupt generation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3299 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30* Update OEA environment, following the PowerPC 2.04 specification:j_mayer
- New mtmsr/mtmsrd form that just update RI and EE bits - New hrfid, lq and stq instructions - Add support for supervisor and hypervisor modes process priority update - Code provision for hypervisor SPR accesses * Actually implement the wait instruction * Bugfixes (missing RETURN in micro-op / missing #ifdef) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3289 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30XER is to be treated as a 64 bits register on 64 bits implementations,j_mayer
according to the PowerPC 2.04 specification. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3279 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30Implement the PowerPC alternate time-base, following the 2.04 specification.j_mayer
Share most code with the time-base management routines. Remove time-base write routines from user-mode emulation environments. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3277 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29Code provision for hypervisor timers resources,j_mayer
as described in PowerPC 2.04 specification. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3264 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29Rework PowerPC exceptions model to make it more versatile:j_mayer
* don't use exception vectors as the exception number. Use vectors numbers as defined in the PowerPC embedded specification instead and extend this model to cover all emulated PowerPC variants exceptions. * add some missing exceptions definitions, from PowerPC 2.04 specification and actual PowerPC implementations. * add code provision for hypervisor exceptions handling. * define exception vectors and prefix in CPUPPCState to emulate BookE exception vectors without any hacks. * define per CPU model valid exception vectors. * handle all known exceptions in user-mode only emulations. * fix hardware interrupts priorities in most cases. * change RET_EXCP macros name into GEN_EXCP as they don't return. * do not stop translation on most instructions that are not defined as context-synchronizing in PowerPC specification. * fix PowerPC 64 jump targets and link register update when in 32 bits mode. * Fix PowerPC 464 and 464F definitions. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3261 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-29Define the proper bfd_mach to be used by the disassembler for eachj_mayer
PowerPC emulated CPU. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3257 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27Move get_sp_from_cpustate from cpu.h to target_signal.h.ths
Enable sigaltstack processing for more architectures. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-27linux-user sigaltstack() syscall, by Thayne Harbaugh.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-26Great rework and cleanups to ease PowerPC implementations definitions.j_mayer
* cleanup cpu.h, removing definitions used only in translate.c/translate_init.c * add new flags to define instructions sets more precisely * various changes in MMU models definitions * add definitions for PowerPC 440/460 support (insns and SPRs). * add definitions for PowerPC 401/403 and 620 input pins model * Fix definitions for most PowerPC 401, 403, 405, 440, 601, 602, 603 and 7x0 * Preliminary support for PowerPC 74xx (aka G4) without altivec. * Code provision for other PowerPC support (7x5, 970, ...). * New SPR and PVR defined, from PowerPC 2.04 specification and other sources * Misc code bugs, error messages and styles fixes. * Update status files for PowerPC cores support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3244 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21More PowerPC definitions, from POWER 2.04 specifications and misc sources.j_mayer
Check that at least instructions set and SPRs are correct for PowerPC 401, 403, 405 and 440 cores. Implement PowerPC 401 MMU model (real-mode only). Improve INSNs and SPRs dump to ease parse with standard shell tools. Add more precise status for most PowerPC cores families. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3201 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21Make CPU hflags be a masked version of the PowerPC MSR.j_mayer
As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-20Move likely and unlikely macros in a common place (Aurelien Jarno).j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3192 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-19TARGET_FMT_lu may also be useful.j_mayer
Fix compilation warnings. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3190 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-19More PowerPC target cleanups:j_mayer
- remove unuseful historical macros and definitions - fix comments (bugs and cosmetics) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3185 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-18Fix PowerPC 32 emulation on 64 bits hosts:j_mayer
we can use 64 bits registers but not pretend page is 1kB long As it seems most Linux programs assume page-size is 4kB, never allow 1kB pages for user-mode only emulation. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3182 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-17Coding style fixes in PowerPC related code (no functional change):j_mayer
- avoid useless blanks at EOL. - avoid tabs. - fix wrapping lines on 80 chars terminals. - add missing ';' at macros EOL to avoid confusing auto-identers. - fix identation. - Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3178 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-07-11Fix PPCEMB for 32bit hosts.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3059 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-23Spelling fixes, by Aurelien Jarno.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3009 c046a42c-6fe2-441c-8c8c-71466251a162
2007-06-03Move target-specific defines to the target directories.ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24Code provision for new PowerPC embedded target support with:j_mayer
- 1 kB page size - 64 bits GPR - 64 bits physical address space - SPE extension support. Change TARGET_PPCSPE into TARGET_PPCEMB git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2718 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-24Improve PowerPC 405 MMU model / share more code for other embedded targetsj_mayer
support. Fix PowerPC 405 MSR mask. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2717 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16Add callbacks to allow dynamic change of PowerPC clocks (to be improved)j_mayer
Fix embedded PowerPC watchdog and timers Fix PowerPC 405 SPR Add generic PowerPC 405 core instanciation code + resets support. Implement simple peripherals shared by most PowerPC 405 implementations PowerPC 405 EC & EP microcontrollers preliminary support git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2690 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16PowerPC 4xx software driven TLB fixes + debug traces.j_mayer
Add code provision for more MMU models support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2683 c046a42c-6fe2-441c-8c8c-71466251a162
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