Age | Commit message (Expand) | Author |
2016-09-07 | ppc: Don't update NIP in facility unavailable interrupts | Benjamin Herrenschmidt |
2016-09-07 | ppc: Provide basic raise_exception_* functions | Benjamin Herrenschmidt |
2016-09-07 | target-ppc: Introduce POWER ISA 3.0 flag | Nikunj A Dadhania |
2016-08-10 | ppc: Introduce a function to look up CPU alias strings | Thomas Huth |
2016-07-12 | target-*: Clean up cpu.h header guards | Markus Armbruster |
2016-07-05 | ppc/hash64: Add proper real mode translation support | Benjamin Herrenschmidt |
2016-07-01 | ppc: Update LPCR definitions | Benjamin Herrenschmidt |
2016-06-29 | target-*: Don't redefine cpu_exec() | Peter Crosthwaite |
2016-06-23 | ppc: Add P7/P8 Power Management instructions | Benjamin Herrenschmidt |
2016-06-23 | ppc: Add real mode CI load/store instructions for P7 and P8 | Benjamin Herrenschmidt |
2016-06-23 | ppc: Fix POWER7 and POWER8 exception definitions | Benjamin Herrenschmidt |
2016-06-14 | ppc: Improve PCR bit selection in ppc_set_compat() | Thomas Huth |
2016-06-14 | ppc: Split pcr_mask settings into supported bits and the register mask | Thomas Huth |
2016-06-07 | Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging | Peter Maydell |
2016-06-07 | virtio: move bi-endian target support to a single location | Greg Kurz |
2016-06-07 | ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash mode | Benjamin Herrenschmidt |
2016-06-07 | ppc: Better figure out if processor has HV mode | Benjamin Herrenschmidt |
2016-05-30 | ppc: Do some batching of TCG tlb flushes | Benjamin Herrenschmidt |
2016-05-30 | ppc: Use split I/D mmu modes to avoid flushes on interrupts | Benjamin Herrenschmidt |
2016-05-30 | ppc: Remove MMU_MODEn_SUFFIX definitions | Benjamin Herrenschmidt |
2016-05-19 | cpu: move exec-all.h inclusion out of cpu.h | Paolo Bonzini |
2016-05-19 | target-ppc: make cpu-qom.h not target specific | Paolo Bonzini |
2016-05-12 | tb: consistently use uint32_t for tb->flags | Emilio G. Cota |
2016-04-18 | ppc: Fix the range check in the LSWI instruction | Thomas Huth |
2016-04-05 | ppc: Rework POWER7 & POWER8 exception model | Cédric Le Goater |
2016-03-24 | ppc: A couple more dummy POWER8 Book4 regs | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add dummy CIABR SPR | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add POWER8 IAMR register | Benjamin Herrenschmidt |
2016-03-24 | ppc: Add dummy SPR_IC for POWER8 | Benjamin Herrenschmidt |
2016-03-24 | ppc: Create cpu_ppc_set_papr() helper | Benjamin Herrenschmidt |
2016-03-24 | ppc: Update SPR definitions | Benjamin Herrenschmidt |
2016-03-16 | ppc: Add a few more P8 PMU SPRs | Benjamin Herrenschmidt |
2016-03-16 | ppc: Define the PSPB register on POWER8 | Thomas Huth |
2016-02-23 | all: Clean up includes | Peter Maydell |
2016-02-01 | target-ppc: mcrfs should always update FEX/VX and only clear exception bits | James Clarke |
2016-01-30 | target-ppc: Make every FPSCR_ macro have a corresponding FP_ macro | James Clarke |
2016-01-30 | target-ppc: Rework SLB page size lookup | David Gibson |
2016-01-30 | target-ppc: rename and export maybe_bswap_register() | Greg Kurz |
2016-01-30 | ppc: Clean up error handling in ppc_set_compat() | David Gibson |
2015-11-30 | target-ppc: Move the FPSCR bit update macros to cpu.h | Madhavan Srinivasan |
2015-11-11 | ppc: Add/Re-introduce MMU model definitions needed by PR KVM | Bharata B Rao |
2015-10-23 | ppc/spapr: Add "ibm,pa-features" property to the device-tree | Benjamin Herrenschmidt |
2015-10-23 | ppc: Add mmu_model defines for arch 2.03 and 2.07 | Benjamin Herrenschmidt |
2015-10-07 | target-*: Drop cpu_gen_code define | Richard Henderson |
2015-09-25 | ppc: Rename ELF_MACHINE to be PPC specific | Peter Crosthwaite |
2015-09-11 | tlb: Add "ifetch" argument to cpu_mmu_index() | Benjamin Herrenschmidt |
2015-07-09 | cpu-exec: Purge all uses of ENV_GET_CPU() | Peter Crosthwaite |
2015-04-28 | Convert (ffs(val) - 1) to ctz32(val) | Stefan Hajnoczi |
2015-03-10 | cpu: Make cpu_init() return QOM CPUState object | Eduardo Habkost |
2015-03-09 | PPC: Introduce the Virtual Time Base (VTB) SPR register | Cyril Bur |