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path: root/target-ppc/cpu.h
AgeCommit message (Expand)Author
2016-02-23all: Clean up includesPeter Maydell
2016-02-01target-ppc: mcrfs should always update FEX/VX and only clear exception bitsJames Clarke
2016-01-30target-ppc: Make every FPSCR_ macro have a corresponding FP_ macroJames Clarke
2016-01-30target-ppc: Rework SLB page size lookupDavid Gibson
2016-01-30target-ppc: rename and export maybe_bswap_register()Greg Kurz
2016-01-30ppc: Clean up error handling in ppc_set_compat()David Gibson
2015-11-30target-ppc: Move the FPSCR bit update macros to cpu.hMadhavan Srinivasan
2015-11-11ppc: Add/Re-introduce MMU model definitions needed by PR KVMBharata B Rao
2015-10-23ppc/spapr: Add "ibm,pa-features" property to the device-treeBenjamin Herrenschmidt
2015-10-23ppc: Add mmu_model defines for arch 2.03 and 2.07Benjamin Herrenschmidt
2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson
2015-09-25ppc: Rename ELF_MACHINE to be PPC specificPeter Crosthwaite
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite
2015-04-28Convert (ffs(val) - 1) to ctz32(val)Stefan Hajnoczi
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost
2015-03-09PPC: Introduce the Virtual Time Base (VTB) SPR registerCyril Bur
2015-03-09target-ppc: Use right page size with hash table lookupAneesh Kumar K.V
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell
2015-01-10Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' int...Peter Maydell
2015-01-07target-ppc: Introduce TEXASRU Bit FieldsTom Musta
2015-01-07target-ppc: Introduce Feature Flag for Transactional MemoryTom Musta
2015-01-07target-ppc: Introduce Instruction Type for Transactional MemoryTom Musta
2014-12-23target-ppc: pass DisasContext to SPR generator functionsPaolo Bonzini
2014-11-04target-ppc: Use macros in opcodes table handling codeBharata B Rao
2014-11-04target-ppc : Allow fc[tf]id[*] mnemonics for non TARGET_PPC64Pierre Mallard
2014-09-25target-ppc: Use cpu_exec_interrupt qom hookRichard Henderson
2014-06-29target-ppc: enable virtio endian ambivalent supportGreg Kurz
2014-06-27target-ppc: Add DFP to Emulated Instructions FlagTom Musta
2014-06-16spapr_hcall: Add address-translation-mode-on-interrupt resource in H_SET_MODEAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's Event Based Branch (EBB) control SPRsAlexey Kardashevskiy
2014-06-16KVM: target-ppc: Enable TM state migrationAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's TM SPRsAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's MMCR2/MMCRS SPRsAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's FSCR SPRAlexey Kardashevskiy
2014-06-16target-ppc: Add POWER8's TIR SPRAlexey Kardashevskiy
2014-06-16target-ppc: Add HID4 SPR for PPC970Alexey Kardashevskiy
2014-06-16target-ppc: Add PMC7/8 to 970 classAlexey Kardashevskiy
2014-06-16target-ppc: Add "POWER" prefix to MMCRA PMU registersAlexey Kardashevskiy
2014-06-16target-ppc: Copy and split gen_spr_7xx() for 970Alexey Kardashevskiy
2014-06-16target-ppc: Merge 970FX and 970MP into a single 970 classAlexey Kardashevskiy
2014-06-16target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRsAlexey Kardashevskiy
2014-06-16PPC: e500: Merge 32 and 64 bit SPE emulationAlexander Graf
2014-06-16spapr: Limit threads per core according to current compatibility modeAlexey Kardashevskiy
2014-06-16target-ppc: Implement "compat" CPU optionAlexey Kardashevskiy
2014-06-16PPC: Properly emulate L1CSR0 and L1CSR1Alexander Graf
2014-06-16PPC: Add L1CFG1 SPR emulationAlexander Graf
2014-06-16PPC: Add definitions for GIVORsAlexander Graf
2014-05-13cpu: make CPU_INTERRUPT_RESET available on all targetsPaolo Bonzini
2014-04-08PPC: Clean up DECR implementationAlexander Graf
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