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2013-02-01target-openrisc: Rename CPU subtypesAndreas Färber
Model names were mapped 1:1 to type names. As a side effect this registered a type "any", which is now a device. To avoid "-device any" silliness and to pave the way for compiling multiple targets into one executable, adopt a <name>-<arch>-cpu scheme. No functional changes for -cpu arguments or -cpu ? output. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-01target-openrisc: TYPE_OPENRISC_CPU should be abstractAndreas Färber
A basic assumption of CPU subtypes is that only specific models get instantiated. A user is not supposed to instantiate an <arch>-cpu. Suppress it via abstract = true, which also drops or32-cpu from -cpu ? output. Cc: qemu-stable@nongnu.org Cc: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-28target-openrisc: Use type_register() instead of type_register_static()Andreas Färber
According to its documentation, type_register_static()'s TypeInfo argument should exist for the life type of the type. Therefore use type_register() when registering the list of CPU subtypes. No functional change with the current implementation. Cf. 918fd0839eeafc83bd4984364321a947d29041fe for arm. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-28target-openrisc: Catch attempt to instantiate abstract type in cpu_init()Andreas Färber
There is no abstract OpenRISCCPU yet, but that seems a bug of its own. Cc: qemu-stable@nongnu.org Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-27target-openrisc: Detect attempt to instantiate non-CPU type in cpu_init()Andreas Färber
Consolidate model checking into a new openrisc_cpu_class_by_name(). If the name matches an existing type, also check whether that type is actually (a sub-type of) TYPE_OPENRISC_CPU. This fixes, e.g., -cpu open_eth asserting. Cc: qemu-stable@nongnu.org Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-27target-openrisc: Clean up triple QOM castsAndreas Färber
Instead of calling openrisc_env_get_cpu(), casting to CPU() via the ENV_GET_CPU() compatibility macro and casting back to OPENRISC_CPU(), just call openrisc_env_get_cpu() directly. ENV_GET_CPU() is meant as workaround for target-independent code only. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-27target-openrisc: Drop OpenRISCCPUListAndreas Färber
It was missed in 92a3136174f60ee45b113296cb2c2a5225b00369 (cpu: Introduce CPUListState struct) because its naming did not match the *CPUListState pattern. Use the generalized CPUListState instead. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19misc: move include files to include/qemu/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19qom: move include files to include/qom/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19exec: move include files to include/exec/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19qapi: move include files to include/qobject/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-16exec: refactor cpu_restore_stateBlue Swirl
Refactor common code around calls to cpu_restore_state(). tb_find_pc() has now no external users, make it static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-11-24target-openrisc: remove conflicting definitions from cpu.hAurelien Jarno
On an ARM host, the registers definitions from cpu.h clash with /usr/include/sys/ucontext.h. As there are unused, just remove them. Cc: Jia Liu <proljc@gmail.com> Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-11-10disas: avoid using cpu_single_envBlue Swirl
Pass around CPUArchState instead of using global cpu_single_env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber
For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
For all targets that currently call tcg_gen_debug_insn_start, add CPU_LOG_TB_OP_OPT to the condition that gates it. This is useful for comparing optimization dumps, when the pre-optimization dump is merely noise. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-07-27target-or32: Add linux user supportJia Liu
Add QEMU OpenRISC linux user support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add system instructionsJia Liu
Add OpenRISC system instructions. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add timer supportJia Liu
Add OpenRISC timer support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add PIC supportJia Liu
Add OpenRISC Programmable Interrupt Controller support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add instruction translationJia Liu
Add OpenRISC instruction tanslation routines. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add float instruction helpersJia Liu
Add OpenRISC float instruction helpers. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add int instruction helpersJia Liu
Add OpenRISC int instruction helpers. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add exception supportJia Liu
Add OpenRISC exception support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add interrupt supportJia Liu
Add OpenRISC interrupt support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add MMU supportJia Liu
Add OpenRISC MMU support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add target stubs and QOM cpuJia Liu
Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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