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2014-02-12target-openrisc: Use new qemu_ld/st opcodesRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
2013-12-23openrisc: Fix spelling in comment (transaltion -> translation)Stefan Weil
I also removed two hyphens in the same comment. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-12-02misc: Replace 'struct QEMUTimer' by 'QEMUTimer'Stefan Weil
Most code already used QEMUTimer without the redundant 'struct' keyword. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-11-20target-openrisc: Correct memory bounds checking for the tlb buffersSebastian Macke
The mtspr and mfspr routines didn't check for the correct memory boundaries. This fixes a segmentation fault while booting Linux. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
2013-11-20openrisc-timer: Reduce overhead, Separate clock update functionsSebastian Macke
The clock value is only evaluated when really necessary reducing the overhead of the timer handling. This also solves a problem in the way the Linux kernel handles the timer and the expected accuracy. The old version could lead to inaccurate timings. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
2013-11-20target-openrisc: Correct wrong epcr register in interrupt handlerSebastian Macke
This patch corrects several misbehaviors during an interrupt process. Most of the time the pc is already correct and therefore no special treatment of the exceptions is necessary. Tested by checking crashing programs which otherwise work in or1ksim. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
2013-11-20target-openrisc: Remove executable flag for every pageSebastian Macke
Pages should be flagged executable only if the tlb executable flag is set or the mmu is off. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
2013-11-20target-openrisc: Remove unnecessary code generated by jump instructionsSebastian Macke
The sr_f variable is only used for the l.bf and l.bnf instructions. For clarity the code is also rewritten using a switch statement instead of if chaining. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
2013-11-20target-openrisc: Speed up move instructionSebastian Macke
The OpenRISC architecture does not have its own move register instruction. Instead it uses either "l.addi rd, r0, x" or "l.ori rd, rs, 0" or "l.or rd, rx, r0" The l.ori instruction is automatically optimized but not the l.addi instruction. This patch optimizes for this special case. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>
2013-10-14Merge remote-tracking branch 'jliu/or32' into stagingAnthony Liguori
# By Sebastian Macke # Via Jia Liu * jliu/or32: target-openrisc: Removes a non-conforming behavior for the first page of the memory target-openrisc: Correct handling of page faults. Message-id: 1380789702-18935-1-git-send-email-proljc@gmail.com Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-10-11Merge remote-tracking branch 'rth/tcg-pull' into stagingAnthony Liguori
# By Richard Henderson # Via Richard Henderson * rth/tcg-pull: exec: Add both big- and little-endian memory helpers tcg: Add qemu_ld_st_i32/64 tcg: Add TCGMemOp configure: Remove CONFIG_QEMU_LDST_OPTIMIZATION tcg: Add tcg-be-ldst.h tcg: Add tcg-be-null.h exec: Delete is_tcg_gen_code and GETRA_EXT tcg-aarch64: Update to helper_ret_*_mmu routines tcg: Merge tcg_register_helper into tcg_context_init tcg: Add tcg-runtime.c helpers to all_helpers tcg: Put target helper data into an array. tcg: Remove stray semi-colons from target-*/helper.h tcg: Move helper registration into tcg_context_init target-m68k: Rename helpers.h to helper.h tcg: Use a GHashTable for tcg_find_helper tcg: Delete tcg_helper_get_name declaration tcg-hppa: Remove tcg backend Message-id: 1381440525-6666-1-git-send-email-rth@twiddle.net Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-10-10tcg: Move helper registration into tcg_context_initRichard Henderson
No longer needs to be done on a per-target basis. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-10-07cpu: Drop cpu_model_str from CPU_COMMONAndreas Färber
Since this is only read in cpu_copy() and linux-user has a global cpu_model, drop the field from generic code. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-10-03target-openrisc: Removes a non-conforming behavior for the first page of the ↵Sebastian Macke
memory Where *software* leaves 0x0000 - 0x2000 unmapped, the hardware should still allow for this area to be mapped. Signed-off-by: Sebastian Macke <sebastian@macke.de> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Reviewed-by: Jia Liu <proljc@gmail.com>
2013-10-03target-openrisc: Correct handling of page faults.Sebastian Macke
The result of (rw & 0) is always zero and therefore a logic false. The whole comparison will therefore never be executed, it is a obvious bug, we should use !(rw & 1) here. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com>
2013-09-02tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson
And update all users. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-07-29cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber
Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code. This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed". The reason for the failure is that CPUClass::kvm_fd is not yet initialized in the following call graph: ->x86_cpu_realizefn ->x86_cpu_apic_realize ->qdev_init ->device_set_realized ->device_reset (hotplugged == 1) ->apic_reset_common ->vapic_base_update ->kvm_apic_vapic_base_update This causes attempted KVM vCPU ioctls to fail. By contrast, in the non-hotplug case the APIC is reset much later, when the vCPU is already initialized. As a quick and safe solution, move the qemu_init_vcpu() call back into the targets' realize functions. Reported-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Acked-by: Igor Mammedov <imammedo@redhat.com> (for i386) Tested-by: Jia Liu <proljc@gmail.com> (for openrisc) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber
This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding Style. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-openrisc: Move cpu_gdb_{read,write}_register()Andreas Färber
Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber
CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-26Merge remote-tracking branch 'jliu/or32' into stagingAnthony Liguori
# By Jia Liu # Via Jia Liu * jliu/or32: target-openrisc: Free typename in openrisc_cpu_class_by_name hw/openrisc: Use stderr output instead of qemu_log hw/openrisc: Indent typo Message-id: 1374576458-22808-1-git-send-email-proljc@gmail.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-23target-openrisc: Free typename in openrisc_cpu_class_by_nameJia Liu
We should free typename here. Signed-off-by: Jia Liu <proljc@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber
Change breakpoint_invalidate() argument to CPUState alongside. Since all targets now assign a softmmu-only field, we can drop helpers cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd(). Prepares for changing cpu_memory_rw_debug() argument to CPUState. Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber
Prepares for changing cpu_single_step() argument to CPUState. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber
Where no extra implementation is needed, fall back to CPUClass::set_pc(). Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber
This moves setting the Program Counter from gdbstub into target code. Use vaddr type as upper-bound replacement for target_ulong. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Move reset logging to CPUStateAndreas Färber
x86 was using additional CPU_DUMP_* flags, so make that configurable in CPUClass::reset_dump_flags. This adds reset logging for alpha, unicore32 and xtensa. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Drop unnecessary dynamic casts in *_env_get_cpu()Andreas Färber
A transition from CPUFooState to FooCPU can be considered safe, just like FooCPU::env access in the opposite direction. The only benefit of the FOO_CPU() casts would be protection against bogus CPUFooState pointers, but then surrounding code would likely break, too. This should slightly improve interrupt etc. performance when going from CPUFooState to FooCPU. For any additional CPU() casts see 3556c233d931ad5ffa46a35cb25cfc057732ebb8 (qom: allow turning cast debugging off). Reported-by: Anthony Liguori <aliguori@us.ibm.com> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell
The functions cpu_clone_regs() and cpu_set_tls() are not purely CPU related -- they are specific to the TLS ABI for a a particular OS. Move them into the linux-user/ tree where they belong. target-lm32 had entirely unused implementations, since it has no linux-user target; just drop them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09target-openrisc: Fix typename in openrisc_cpu_class_by_name()Dongxue Zhang
Commit 478032a93d908e59085c1ac56f10979942e7dc4f (target-openrisc: Rename CPU subtypes) suffixed CPU sub-types with "-or32-cpu" but forgot to update openrisc_cpu_class_by_name(), so that it was still looking for the types without suffix. Make target-openrisc running OK by adding the suffix to the model name. This means it is no longer possible to use -cpu or1200-or32-cpu or -cpu any-or32-cpu though. Cc: qemu-stable@nongnu.org Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Tested-by: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-28cpu: Change qemu_init_vcpu() argument to CPUStateAndreas Färber
This allows to move the call into CPUState's realizefn. Therefore move the stub into libqemustub.a. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-28cpu: Turn cpu_dump_{state,statistics}() into CPUState hooksAndreas Färber
Make cpustats monitor command available unconditionally. Prepares for changing kvm_handle_internal_error() and kvm_cpu_exec() arguments to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-28target-openrisc: Register VMStateDescription for OpenRISCCPUAndreas Färber
Since commit e67db06e9f6d7e514ee2a9b9b769ecd42977f6fb (target-or32: Add target stubs and QOM cpu) a VMStateDescription existed, but CPU_SAVE_VERSION was not set, so it was never registered. Drop cpu_{save,load}() and register VMStateDescription via DeviceState. Use a version_id of 1 and specify minimum versions as well. Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber
This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell
The gen_icount_start/end functions are now somewhat misnamed since they are useful for generic "start/end of TB" code, used for more than just icount. Rename them to gen_tb_start/end. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-03cpu: Introduce ENV_OFFSET macrosAndreas Färber
Introduce ENV_OFFSET macros which can be used in non-target-specific code that needs to generate TCG instructions which reference CPUState fields given the cpu_env register that TCG targets set up with a pointer to the CPUArchState struct. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23qemu-log: Remove qemu_log_try_set_file() and its usersPeter Maydell
Remove the function qemu_log_try_set_file() and its users (which are all in TCG code generation functions for various targets). This function was added to abstract out code which was originally written as "if (!logfile) logfile = stderr;" in order that BUG: case code which did an unguarded "fprintf(logfile, ...)" would not crash if debug logging was not enabled. Since those direct uses of logfile have also been abstracted away into qemu_log() calls which check for a NULL logfile, there is no need for the target-* files to mess with the user's chosen logging settings. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16cpu: Add CPUArchState pointer to CPUStateAndreas Färber
The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-openrisc: Update OpenRISCCPU to QOM realizefnAndreas Färber
Update the openrisc_cpu_realize() signature, hook it up to DeviceClass::realize and set realized = true in cpu_openrisc_init(). qapi/error.h is now included through qdev and no longer needed. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Jia Liu <proljc@gmail.com>
2013-02-01target-openrisc: Rename CPU subtypesAndreas Färber
Model names were mapped 1:1 to type names. As a side effect this registered a type "any", which is now a device. To avoid "-device any" silliness and to pave the way for compiling multiple targets into one executable, adopt a <name>-<arch>-cpu scheme. No functional changes for -cpu arguments or -cpu ? output. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-01target-openrisc: TYPE_OPENRISC_CPU should be abstractAndreas Färber
A basic assumption of CPU subtypes is that only specific models get instantiated. A user is not supposed to instantiate an <arch>-cpu. Suppress it via abstract = true, which also drops or32-cpu from -cpu ? output. Cc: qemu-stable@nongnu.org Cc: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-28target-openrisc: Use type_register() instead of type_register_static()Andreas Färber
According to its documentation, type_register_static()'s TypeInfo argument should exist for the life type of the type. Therefore use type_register() when registering the list of CPU subtypes. No functional change with the current implementation. Cf. 918fd0839eeafc83bd4984364321a947d29041fe for arm. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-28target-openrisc: Catch attempt to instantiate abstract type in cpu_init()Andreas Färber
There is no abstract OpenRISCCPU yet, but that seems a bug of its own. Cc: qemu-stable@nongnu.org Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-27target-openrisc: Detect attempt to instantiate non-CPU type in cpu_init()Andreas Färber
Consolidate model checking into a new openrisc_cpu_class_by_name(). If the name matches an existing type, also check whether that type is actually (a sub-type of) TYPE_OPENRISC_CPU. This fixes, e.g., -cpu open_eth asserting. Cc: qemu-stable@nongnu.org Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-27target-openrisc: Clean up triple QOM castsAndreas Färber
Instead of calling openrisc_env_get_cpu(), casting to CPU() via the ENV_GET_CPU() compatibility macro and casting back to OPENRISC_CPU(), just call openrisc_env_get_cpu() directly. ENV_GET_CPU() is meant as workaround for target-independent code only. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-27target-openrisc: Drop OpenRISCCPUListAndreas Färber
It was missed in 92a3136174f60ee45b113296cb2c2a5225b00369 (cpu: Introduce CPUListState struct) because its naming did not match the *CPUListState pattern. Use the generalized CPUListState instead. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
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