Age | Commit message (Collapse) | Author | |
---|---|---|---|
2012-07-27 | target-or32: Add interrupt support | Jia Liu | |
Add OpenRISC interrupt support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> | |||
2012-07-27 | target-or32: Add target stubs and QOM cpu | Jia Liu | |
Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> |