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AgeCommit message (Expand)Author
2010-08-06mips: Add support for VInt and VEIC irq modesEdgar E. Iglesias
2010-07-31Correctly identify multiple cpus in SMP systemsHervé Poussineau
2010-07-31Remove unused constantHervé Poussineau
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno
2010-07-24mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias
2010-07-17target-mips: fix xtlb exception for loongsonAurelien Jarno
2010-07-11target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini
2010-07-03remove unused stuff from */exec.hPaolo Bonzini
2010-07-01target-mips: add Loongson support prefetchAurelien Jarno
2010-07-01target-mips: split load and storeAurelien Jarno
2010-06-30target-mips: fix DINSU instructionAurelien Jarno
2010-06-29target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno
2010-06-29MIPS: Initial support of fulong mini pc (CPU definition)Huacai Chen
2010-06-09target-mips: Fix compilationStefan Weil
2010-06-09target-mips: add microMIPS exception handler supportNathan Froyd
2010-06-09target-mips: microMIPS ASE supportNathan Froyd
2010-06-09target-mips: mips16 cleanupsNathan Froyd
2010-06-09target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd
2010-06-09target-mips: move FP FMT comments closer to the definitionsAurelien Jarno
2010-06-09target-mips: define constants for magic numbersNathan Froyd
2010-06-08target-mips: break out [ls][wd]c1 and rdhwr insn generationNathan Froyd
2010-05-05target-mips: Remove duplicate CPU log.Richard Henderson
2010-04-09target-mips: Fix format specifiers for fpu_fprintfStefan Weil
2010-04-08target-mips: Fix one more format specifier for cpu_fprintfStefan Weil
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini
2010-03-17Large page TLB flushPaul Brook
2010-03-13target-mips: update address space definitionsAurelien Jarno
2010-03-12Target specific usermode cleanupPaul Brook
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson
2010-03-04target-mips: use newer logical opsAurelien Jarno
2010-03-02target-mips: use setcond when possibleAurelien Jarno
2010-02-23target-mips: fix ROTR and DROTR by zeroNathan Froyd
2010-02-23target-mips: fix CpU exception for coprocessor 0Nathan Froyd
2010-02-23target-mips: remove useless sign extensionAurelien Jarno
2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini
2009-12-17target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil
2009-12-16target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil
2009-12-13target-mips: fix user-mode emulation startupNathan Froyd
2009-12-13target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd
2009-12-13target-mips: add copyright notice for mips16 workNathan Froyd
2009-12-13target-mips: add mips16 instruction decodingNathan Froyd
2009-12-13target-mips: add enums for MIPS16 opcodesNathan Froyd
2009-12-13target-mips: split out delay slot handlingNathan Froyd
2009-12-13target-mips: add gen_base_offset_addrNathan Froyd
2009-12-13target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd
2009-12-13target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd
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