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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-mips
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2012-10-31
target-mips: optimize ddiv/ddivu/div/divu with movcond
Aurelien Jarno
2012-10-31
target-mips: implement movn/movz using movcond
Aurelien Jarno
2012-10-31
target-mips: don't use local temps for store conditional
Aurelien Jarno
2012-10-31
target-mips: implement unaligned loads using TCG
Aurelien Jarno
2012-10-31
target-mips: simplify load/store microMIPS helpers
Aurelien Jarno
2012-10-31
target-mips: optimize load operations
Aurelien Jarno
2012-10-31
target-mips: cleanup load/store operations
Aurelien Jarno
2012-10-31
target-mips: restore CPU state after an FPU exception
Aurelien Jarno
2012-10-31
target-mips: use softfloat constants when possible
Aurelien Jarno
2012-10-31
target-mips: cleanup float to int conversion helpers
Aurelien Jarno
2012-10-31
target-mips: fix FPU exceptions
Aurelien Jarno
2012-10-31
target-mips: keep softfloat exception set to 0 between instructions
Aurelien Jarno
2012-10-31
target-mips: use the softfloat floatXX_muladd functions
Aurelien Jarno
2012-10-31
target-mips: do not save CPU state when using retranslation
Aurelien Jarno
2012-10-31
target-mips: correctly restore btarget upon exception
Aurelien Jarno
2012-10-31
target-mips: remove #if defined(TARGET_MIPS64) in opcode enums
Aurelien Jarno
2012-10-31
target-mips: Change TODO file
Jia Liu
2012-10-31
target-mips: Add ASE DSP processors
Jia Liu
2012-10-31
target-mips: Add ASE DSP accumulator instructions
Jia Liu
2012-10-31
target-mips: Add ASE DSP compare-pick instructions
Jia Liu
2012-10-31
target-mips: Add ASE DSP bit/manipulation instructions
Jia Liu
2012-10-31
target-mips: Add ASE DSP multiply instructions
Jia Liu
2012-10-31
target-mips: Add ASE DSP GPR-based shift instructions
Jia Liu
2012-10-31
target-mips: Add ASE DSP arithmetic instructions
Jia Liu
2012-10-31
target-mips: Add ASE DSP load instructions
Jia Liu
2012-10-31
target-mips: Add ASE DSP branch instructions
Jia Liu
2012-10-31
Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number
Jia Liu
2012-10-31
target-mips: Add ASE DSP resources access check
Jia Liu
2012-10-31
target-mips: Add ASE DSP internal functions
Jia Liu
2012-10-31
cpus: Pass CPUState to [qemu_]cpu_has_work()
Andreas Färber
2012-10-28
target-mips: Use TCG registers for the FPU.
Richard Henderson
2012-10-28
target-mips: rename helper flags
Aurelien Jarno
2012-10-23
Rename target_phys_addr_t to hwaddr
Avi Kivity
2012-10-17
target-mips: Pass MIPSCPU to mips_vpe_sleep()
Andreas Färber
2012-10-17
target-mips: Pass MIPSCPU to mips_tc_sleep()
Andreas Färber
2012-10-17
target-mips: Pass MIPSCPU to mips_vpe_is_wfi()
Andreas Färber
2012-10-17
target-mips: Pass MIPSCPU to mips_tc_wake()
Andreas Färber
2012-10-17
target-mips: Clean up other_cpu in helper_{d,e}vpe()
Andreas Färber
2012-09-27
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
Richard Henderson
2012-09-19
target-mips: Implement Loongson Multimedia Instructions
Richard Henderson
2012-09-19
target-mips: Always evaluate debugging macro arguments
Richard Henderson
2012-09-19
target-mips: Fix MIPS_DEBUG.
Richard Henderson
2012-09-19
target-mips: Set opn in gen_ldst_multiple.
Richard Henderson
2012-09-15
target-mips: switch to AREG0 free mode
Blue Swirl
2012-09-08
MIPS/user: Fix reset CPU state initialization
Maciej W. Rozycki
2012-08-27
target-mips: allow microMIPS SWP and SDP to have RD equal to BASE
Eric Johnson
2012-08-27
target-mips: add privilege level check to several Cop0 instructions
Eric Johnson
2012-08-27
mips-linux-user: Always support rdhwr.
Richard Henderson
2012-08-27
target-mips: Streamline indexed cp1 memory addressing.
Richard Henderson
2012-08-27
Fix order of CVT.PS.S operands
Richard Sandiford
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