Age | Commit message (Expand) | Author |
2012-12-08 | Merge branch 'master' of git.qemu-project.org:/pub/git/qemu | Blue Swirl |
2012-12-08 | TCG: Use gen_opc_instr_start from context instead of global variable. | Evgeny Voevodin |
2012-12-08 | TCG: Use gen_opc_icount from context instead of global variable. | Evgeny Voevodin |
2012-12-08 | TCG: Use gen_opc_pc from context instead of global variable. | Evgeny Voevodin |
2012-12-06 | target-mips: Fix incorrect shift for SHILO and SHILOV | Petar Jovanovic |
2012-12-06 | target-mips: Fix incorrect code and test for INSV | Petar Jovanovic |
2012-11-24 | target-mips: remove POOL48A from the microMIPS decoding | Aurelien Jarno |
2012-11-24 | target-mips: Clean up microMIPS32 major opcode | 陳韋任 (Wei-Ren Chen) |
2012-11-24 | target-mips: Add comments on POOL32Axf encoding | 陳韋任 (Wei-Ren Chen) |
2012-11-17 | TCG: Use gen_opc_buf from context instead of global variable. | Evgeny Voevodin |
2012-11-17 | TCG: Use gen_opc_ptr from context instead of global variable. | Evgeny Voevodin |
2012-11-15 | target-mips: fix wrong microMIPS opcode encoding | 陳韋任 (Wei-Ren Chen) |
2012-11-11 | target-mips: Fix seg fault for LUI when MIPS_DEBUG_DISAS==1. | Eric Johnson |
2012-11-10 | disas: avoid using cpu_single_env | Blue Swirl |
2012-11-05 | target-mips: use ULL for 64 bit constants | Blue Swirl |
2012-11-01 | Merge remote-tracking branch 'afaerber/qom-cpu' into staging | Anthony Liguori |
2012-10-31 | target-mips: don't flush extra TLB on permissions upgrade | Aurelien Jarno |
2012-10-31 | target-mips: fix TLBR wrt SEGMask | Aurelien Jarno |
2012-10-31 | target-mips: use deposit instead of hardcoded version | Aurelien Jarno |
2012-10-31 | target-mips: optimize ddiv/ddivu/div/divu with movcond | Aurelien Jarno |
2012-10-31 | target-mips: implement movn/movz using movcond | Aurelien Jarno |
2012-10-31 | target-mips: don't use local temps for store conditional | Aurelien Jarno |
2012-10-31 | target-mips: implement unaligned loads using TCG | Aurelien Jarno |
2012-10-31 | target-mips: simplify load/store microMIPS helpers | Aurelien Jarno |
2012-10-31 | target-mips: optimize load operations | Aurelien Jarno |
2012-10-31 | target-mips: cleanup load/store operations | Aurelien Jarno |
2012-10-31 | target-mips: restore CPU state after an FPU exception | Aurelien Jarno |
2012-10-31 | target-mips: use softfloat constants when possible | Aurelien Jarno |
2012-10-31 | target-mips: cleanup float to int conversion helpers | Aurelien Jarno |
2012-10-31 | target-mips: fix FPU exceptions | Aurelien Jarno |
2012-10-31 | target-mips: keep softfloat exception set to 0 between instructions | Aurelien Jarno |
2012-10-31 | target-mips: use the softfloat floatXX_muladd functions | Aurelien Jarno |
2012-10-31 | target-mips: do not save CPU state when using retranslation | Aurelien Jarno |
2012-10-31 | target-mips: correctly restore btarget upon exception | Aurelien Jarno |
2012-10-31 | target-mips: remove #if defined(TARGET_MIPS64) in opcode enums | Aurelien Jarno |
2012-10-31 | target-mips: Change TODO file | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP processors | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP accumulator instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP compare-pick instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP bit/manipulation instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP multiply instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP GPR-based shift instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP arithmetic instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP load instructions | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP branch instructions | Jia Liu |
2012-10-31 | Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP resources access check | Jia Liu |
2012-10-31 | target-mips: Add ASE DSP internal functions | Jia Liu |
2012-10-31 | cpus: Pass CPUState to [qemu_]cpu_has_work() | Andreas Färber |
2012-10-28 | target-mips: Use TCG registers for the FPU. | Richard Henderson |