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AgeCommit message (Expand)Author
2012-10-31target-mips: remove #if defined(TARGET_MIPS64) in opcode enumsAurelien Jarno
2012-10-31target-mips: Change TODO fileJia Liu
2012-10-31target-mips: Add ASE DSP processorsJia Liu
2012-10-31target-mips: Add ASE DSP accumulator instructionsJia Liu
2012-10-31target-mips: Add ASE DSP compare-pick instructionsJia Liu
2012-10-31target-mips: Add ASE DSP bit/manipulation instructionsJia Liu
2012-10-31target-mips: Add ASE DSP multiply instructionsJia Liu
2012-10-31target-mips: Add ASE DSP GPR-based shift instructionsJia Liu
2012-10-31target-mips: Add ASE DSP arithmetic instructionsJia Liu
2012-10-31target-mips: Add ASE DSP load instructionsJia Liu
2012-10-31target-mips: Add ASE DSP branch instructionsJia Liu
2012-10-31Use correct acc value to index cpu_HI/cpu_LO rather than using a fix numberJia Liu
2012-10-31target-mips: Add ASE DSP resources access checkJia Liu
2012-10-31target-mips: Add ASE DSP internal functionsJia Liu
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber
2012-10-28target-mips: Use TCG registers for the FPU.Richard Henderson
2012-10-28target-mips: rename helper flagsAurelien Jarno
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_sleep()Andreas Färber
2012-10-17target-mips: Pass MIPSCPU to mips_tc_sleep()Andreas Färber
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_is_wfi()Andreas Färber
2012-10-17target-mips: Pass MIPSCPU to mips_tc_wake()Andreas Färber
2012-10-17target-mips: Clean up other_cpu in helper_{d,e}vpe()Andreas Färber
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
2012-09-19target-mips: Implement Loongson Multimedia InstructionsRichard Henderson
2012-09-19target-mips: Always evaluate debugging macro argumentsRichard Henderson
2012-09-19target-mips: Fix MIPS_DEBUG.Richard Henderson
2012-09-19target-mips: Set opn in gen_ldst_multiple.Richard Henderson
2012-09-15target-mips: switch to AREG0 free modeBlue Swirl
2012-09-08MIPS/user: Fix reset CPU state initializationMaciej W. Rozycki
2012-08-27target-mips: allow microMIPS SWP and SDP to have RD equal to BASEEric Johnson
2012-08-27target-mips: add privilege level check to several Cop0 instructionsEric Johnson
2012-08-27mips-linux-user: Always support rdhwr.Richard Henderson
2012-08-27target-mips: Streamline indexed cp1 memory addressing.Richard Henderson
2012-08-27Fix order of CVT.PS.S operandsRichard Sandiford
2012-08-27Fix operands of RECIP2.S and RECIP2.PSRichard Sandiford
2012-08-24target-mips: Fix some helper functions (VR54xx multiplication)Stefan Weil
2012-08-23target-mips: Enable access to required RDHWR hardware registersMeador Inge
2012-08-09MIPS: Correct FCR0 initializationNathan Froyd
2012-06-07build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini
2012-06-07build: move libobj-y variable to nested Makefile.objsPaolo Bonzini
2012-06-07build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini
2012-06-04Kill off cpu_state_reset()Andreas Färber
2012-06-04target-mips: Let cpu_mips_init() return MIPSCPUAndreas Färber
2012-06-04target-mips: Use cpu_reset() in do_interrupt()Andreas Färber
2012-06-04target-mips: Use cpu_reset() in cpu_mips_init()Andreas Färber
2012-05-19mips: Fix BC1ANY[24]F instructionsRichard Sandiford
2012-05-12target-mips: Remove commented-out function declarationAndreas Färber
2012-05-03target-mips: Remove unused inline functionStefan Weil
2012-05-01Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpuBlue Swirl
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