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AgeCommit message (Expand)Author
2008-12-07MIPS: remove a few warningsaurel32
2008-11-30Common cpu_loop_exit prototypeaurel32
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori
2008-11-17TCG variable type checking.pbrook
2008-11-15target-mips: avoid tcg internal error in mfc0/dmfc0aurel32
2008-11-11Revert commits 5685 to 5688 committed by mistakeaurel32
2008-11-11Don't stop translation for mtc0 compareaurel32
2008-11-11target-mips: gen_compute_branch1()aurel32
2008-11-11target-mips: optimize movc*()aurel32
2008-11-11target-mips: optimize gen_farith()aurel32
2008-11-11target-mips: optimize gen_muldiv()aurel32
2008-11-11target-mips: optimize gen_arith()/gen_arith_imm()aurel32
2008-11-11target-mips: convert bit shuffle ops to TCGaurel32
2008-11-11target-mips: convert bitfield ops to TCGaurel32
2008-11-11target-mips: optimize gen_op_addr_add() (2/2)aurel32
2008-11-11target-mips: optimize gen_op_addr_add() (1/2)aurel32
2008-11-11target-mips: optimize gen_save_pc()aurel32
2008-11-11target-mips: fix mft* helpers/callaurel32
2008-11-11target-mips: fix temporary variable freeing in op_ldst_##insn()aurel32
2008-11-04target-mips: use the new rotr/rotri instructionsaurel32
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir1
2008-09-22Use concet TCG instructions in the MIPS target.ths
2008-09-21Fix Xcontext fill, by Here Poussineau.ths
2008-09-21Add concat_i32_i64 op.pbrook
2008-09-18Use TCG registers for most CPU register accesses.ths
2008-09-18Move the active FPU registers into env again, and use more TCG registersths
2008-09-14MIPS: Fix tlbwi/tlbwraurel32
2008-09-14MIPS: remove empty cpu_mips_irqctrl_init()aurel32
2008-09-14target-mips: fix warningaurel32
2008-09-05TCG fixes for target-mipsaurel32
2008-09-02Build fix for gcc-3.3.ths
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir1
2008-08-23MIPS: don't free TCG temporary variable twiceaurel32
2008-08-01Delete unused variable.ths
2008-07-23Use plain standard inline.ths
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths
2008-07-21A bunch of minor code improvements in the MIPS target.ths
2008-07-21Fix logging output for MIPS HI, LO registers, by Stefan Weil.ths
2008-07-20Fix compiler warning, by Stefan Weil.ths
2008-07-20Simplify conditional FP moves.ths
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths
2008-07-09Use temporary registers for the MIPS FPU emulation.ths
2008-07-05Fix typo in comment.ths
2008-07-05Change MIPS machine default to Malta.ths
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook
2008-07-01Static'ify some functions, and use standard inline in translate.c.ths
2008-07-01Delete duplicate code.ths
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