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QEMU is a generic and open source machine & userspace emulator and virtualizer
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target-mips
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2015-03-19
target-mips: Fix warning from Sparse
Stefan Weil
2015-03-13
tcg: Change translator-side labels to a pointer
Richard Henderson
2015-03-12
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
Peter Maydell
2015-03-11
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150311' into staging
Peter Maydell
2015-03-11
kvm: add machine state to kvm_arch_init
Marcel Apfelbaum
2015-03-11
target-mips: add missing MSACSR and restore fp_status and hflags
Leon Alrae
2015-03-11
target-mips: replace cpu_save/cpu_load with VMStateDescription
Leon Alrae
2015-03-10
cpu: Make cpu_init() return QOM CPUState object
Eduardo Habkost
2015-02-13
target-mips: pass 0 instead of -1 as rs in microMIPS LUI instruction
Leon Alrae
2015-02-13
target-mips: fix broken snapshotting
Leon Alrae
2015-02-13
target-mips: use CP0EnLo_XI instead of magic number
Leon Alrae
2015-02-13
target-mips: ll and lld cause AdEL exception for unaligned address
Leon Alrae
2015-02-13
target-mips: fix detection of the end of the page during translation
Leon Alrae
2015-02-13
target-mips: Make CP0.Status.CU1 read-only for the 5Kc and 5KEc processors
Maciej W. Rozycki
2015-02-12
tcg: Introduce tcg_op_buf_count and tcg_op_buf_full
Richard Henderson
2015-02-12
tcg: Move emit of INDEX_op_end into gen_tb_end
Richard Henderson
2015-02-10
target-mips: Clean up switch fall through after commit fecd264
Markus Armbruster
2015-02-06
softfloat: expand out STATUS_VAR
Peter Maydell
2015-02-06
softfloat: Expand out the STATUS_PARAM macro
Peter Maydell
2015-01-20
target-mips: Don't use _raw load/store accessors
Peter Maydell
2015-01-20
exec.c: Drop TARGET_HAS_ICE define and checks
Peter Maydell
2015-01-12
kvm: extend kvm_irqchip_add_msi_route to work on s390
Frank Blaschka
2015-01-03
gen-icount: check cflags instead of use_icount global
Paolo Bonzini
2015-01-03
translate: check cflags instead of use_icount global
Paolo Bonzini
2014-12-17
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141216' into staging
Peter Maydell
2014-12-16
qemu-log: add log category for MMU info
Antony Pavlov
2014-12-16
target-mips: remove excp_names[] from linux-user as it is unused
Leon Alrae
2014-12-16
target-mips: convert single case switch into if statement
Leon Alrae
2014-12-16
target-mips: Fix DisasContext's ulri member initialization
Maciej W. Rozycki
2014-12-16
target-mips: Use local float status pointer across MSA macros
Maciej W. Rozycki
2014-12-16
target-mips: Add missing calls to synchronise SoftFloat status
Maciej W. Rozycki
2014-12-16
target-mips: Also apply the CP0.Status mask to MTTC0
Maciej W. Rozycki
2014-12-16
target-mips: gdbstub: Clean up FPU register handling
Maciej W. Rozycki
2014-12-16
target-mips: Correct 32-bit address space wrapping
Maciej W. Rozycki
2014-12-16
target-mips: Tighten ISA level checks
Maciej W. Rozycki
2014-12-16
target-mips: Fix CP0.Config3.ISAOnExc write accesses
Maciej W. Rozycki
2014-12-16
target-mips: Output CP0.Config2-5 in the register dump
Maciej W. Rozycki
2014-12-16
target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP
Maciej W. Rozycki
2014-12-16
target-mips: Correct the writes to Status and Cause registers via gdbstub
Maciej W. Rozycki
2014-12-16
target-mips: Correct the handling of writes to CP0.Status for MIPSr6
Maciej W. Rozycki
2014-12-16
target-mips: Correct MIPS16/microMIPS branch size calculation
Maciej W. Rozycki
2014-12-16
target-mips: Restore the order of helpers
Maciej W. Rozycki
2014-12-16
target-mips: Remove unused `FLOAT_OP' macro
Maciej W. Rozycki
2014-12-16
target-mips: Make `helper_float_cvtw_s' consistent with the remaining helpers
Maciej W. Rozycki
2014-12-16
target-mips: Fix formatting in `decode_opc'
Maciej W. Rozycki
2014-12-16
target-mips: Fix formatting in `mips_defs'
Maciej W. Rozycki
2014-12-16
target-mips: Fix formatting in `decode_extended_mips16_opc'
Maciej W. Rozycki
2014-12-16
target-mips: Enable vectored interrupt support for the 74Kf CPU
Maciej W. Rozycki
2014-12-16
target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processors
Maciej W. Rozycki
2014-12-16
target-mips: Make CP0.Config4 and CP0.Config5 registers signed
Maciej W. Rozycki
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