| Age | Commit message (Expand) | Author |
|---|
| 2012-10-31 | target-mips: Add ASE DSP compare-pick instructions | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP bit/manipulation instructions | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP multiply instructions | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP GPR-based shift instructions | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP arithmetic instructions | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP load instructions | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP branch instructions | Jia Liu |
| 2012-10-31 | Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP resources access check | Jia Liu |
| 2012-10-31 | target-mips: Add ASE DSP internal functions | Jia Liu |
| 2012-10-31 | cpus: Pass CPUState to [qemu_]cpu_has_work() | Andreas Färber |
| 2012-10-28 | target-mips: Use TCG registers for the FPU. | Richard Henderson |
| 2012-10-28 | target-mips: rename helper flags | Aurelien Jarno |
| 2012-10-23 | Rename target_phys_addr_t to hwaddr | Avi Kivity |
| 2012-10-17 | target-mips: Pass MIPSCPU to mips_vpe_sleep() | Andreas Färber |
| 2012-10-17 | target-mips: Pass MIPSCPU to mips_tc_sleep() | Andreas Färber |
| 2012-10-17 | target-mips: Pass MIPSCPU to mips_vpe_is_wfi() | Andreas Färber |
| 2012-10-17 | target-mips: Pass MIPSCPU to mips_tc_wake() | Andreas Färber |
| 2012-10-17 | target-mips: Clean up other_cpu in helper_{d,e}vpe() | Andreas Färber |
| 2012-09-27 | Emit debug_insn for CPU_LOG_TB_OP_OPT as well. | Richard Henderson |
| 2012-09-19 | target-mips: Implement Loongson Multimedia Instructions | Richard Henderson |
| 2012-09-19 | target-mips: Always evaluate debugging macro arguments | Richard Henderson |
| 2012-09-19 | target-mips: Fix MIPS_DEBUG. | Richard Henderson |
| 2012-09-19 | target-mips: Set opn in gen_ldst_multiple. | Richard Henderson |
| 2012-09-15 | target-mips: switch to AREG0 free mode | Blue Swirl |
| 2012-09-08 | MIPS/user: Fix reset CPU state initialization | Maciej W. Rozycki |
| 2012-08-27 | target-mips: allow microMIPS SWP and SDP to have RD equal to BASE | Eric Johnson |
| 2012-08-27 | target-mips: add privilege level check to several Cop0 instructions | Eric Johnson |
| 2012-08-27 | mips-linux-user: Always support rdhwr. | Richard Henderson |
| 2012-08-27 | target-mips: Streamline indexed cp1 memory addressing. | Richard Henderson |
| 2012-08-27 | Fix order of CVT.PS.S operands | Richard Sandiford |
| 2012-08-27 | Fix operands of RECIP2.S and RECIP2.PS | Richard Sandiford |
| 2012-08-24 | target-mips: Fix some helper functions (VR54xx multiplication) | Stefan Weil |
| 2012-08-23 | target-mips: Enable access to required RDHWR hardware registers | Meador Inge |
| 2012-08-09 | MIPS: Correct FCR0 initialization | Nathan Froyd |
| 2012-06-07 | build: move other target-*/ objects to nested Makefile.objs | Paolo Bonzini |
| 2012-06-07 | build: move libobj-y variable to nested Makefile.objs | Paolo Bonzini |
| 2012-06-07 | build: move obj-TARGET-y variables to nested Makefile.objs | Paolo Bonzini |
| 2012-06-04 | Kill off cpu_state_reset() | Andreas Färber |
| 2012-06-04 | target-mips: Let cpu_mips_init() return MIPSCPU | Andreas Färber |
| 2012-06-04 | target-mips: Use cpu_reset() in do_interrupt() | Andreas Färber |
| 2012-06-04 | target-mips: Use cpu_reset() in cpu_mips_init() | Andreas Färber |
| 2012-05-19 | mips: Fix BC1ANY[24]F instructions | Richard Sandiford |
| 2012-05-12 | target-mips: Remove commented-out function declaration | Andreas Färber |
| 2012-05-03 | target-mips: Remove unused inline function | Stefan Weil |
| 2012-05-01 | Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpu | Blue Swirl |
| 2012-04-30 | target-mips: Start QOM'ifying CPU init | Andreas Färber |
| 2012-04-30 | target-mips: QOM'ify CPU | Andreas Färber |
| 2012-04-28 | target-mips: Move definition of uint_fast{8, 16}_t to osdep.h | Andreas Färber |
| 2012-04-15 | target-mips: Fix type cast for w64 (uintptr_t) | Stefan Weil |
