aboutsummaryrefslogtreecommitdiff
path: root/target-mips
AgeCommit message (Collapse)Author
2011-06-26Remove exec-all.h include directivesBlue Swirl
Most exec-all.h include directives are now useless, remove them. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is needed by later patches. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl
Before the next patch, fix coding style of the areas affected. Change the type of the return value from cpu_has_work() and qemu_cpu_has_work() to bool. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu_loop_exit: avoid using AREG0Blue Swirl
Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-15target-mips: Fix warning caused by unused local variableAurelien Jarno
Fix compilation with gcc-4.6, based on a patch from Stefan Weil <weil@mail.berlios.de>. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-12Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori
Conflicts: cpu-all.h
2011-05-08target-mips: Do not check CPU_INTERRUPT_TIMER.Richard Henderson
This bit is never set, therefore we should not read it either. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-08Fix typos in comments (interupt -> interrupt)Stefan Weil
Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-05-06Fix typo in code and commentsStefan Weil
Replace writeable -> writable Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil
Function gen_pc_load was introduced in commit d2856f1ad4c259e5766847c49acbb4e390731bd4. The only reason for parameter searched_pc was a debug statement in target-i386/translate.c. Parameter puc was needed by target-sparc until commit d7da2a10402f1644128b66414ca8f86bdea9ae7c. Remove searched_pc from the debug statement and remove both parameters from the parameter list of gen_pc_load. As the function name gen_pc_load was also misleading, it is now called restore_state_to_opc. This new name was suggested by Peter Maydell, thanks. v2: Remove last parameter, too, and rename the function. v3: Fix [] typo in target-arm/translate.c. Fix wrong SHA1 object name in commit message (copy+paste error). Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-17target-mips: clear softfpu exception state for comparison instructionsAurelien Jarno
MIPS FPU instructions should start with a clean softfpu status. This is done for the most instructions, but not for comparison ones. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-mips: fix c.ps.* instructionsAurelien Jarno
Contrary to cabs.ps.* instructions, c.ps.* should not compare the absolute value of the operand, but directly the operands. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-mips: don't hardcode softfloat exception bitsAurelien Jarno
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-mips: simplify FP comparisonsAurelien Jarno
As the softfloat comparison functions already test for NaN, there is no need to always call the float*_unordered*() functions. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17softfloat: rename float*_eq() into float*_eq_quiet()Aurelien Jarno
float*_eq functions have a different semantics than other comparison functions. Fix that by first renaming float*_quiet() into float*_eq_quiet(). Note that it is purely mechanical, and the behaviour should be unchanged. That said it clearly highlight problems due to this different semantics, they are fixed later in this patch series. Cc: Alexander Graf <agraf@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-mips: use new float*_unordered*() functionsAurelien Jarno
Use the new float*_unordered*() functions from softfloat instead of redefining a private version. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil
tcg_gen_exit_tb takes a parameter of type tcg_target_long, so the type casts of pointer to long should be replaced by type casts of pointer to tcg_target_long (suggested by Blue Swirl). These changes are needed for build environments where sizeof(long) != sizeof(void *), especially for w64. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-03Fix trivial "endianness bugs"Stefan Weil
Replace endianess -> endianness. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-13inline cpu_halted into sole callerPaolo Bonzini
All implementations are now the same, and there is only one caller, so inline the function there. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-02-09[PATCH] [MIPS] Clear softfpu exception state for round, trunc, ceil and floorChris Dearman
MIPS FPU instructions should start with a clean softfpu status. This is done for the arithmetic operations and cvt instructions, but not for round, trunc, ceil and floor. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-24target-mips: fix save_cpu_state() callsAurelien Jarno
The rule is: - don't save PC if the exception is only triggered by softmmu. - save PC if the exception can be triggered by an helper. Fix a 64-bit kernel crash when loading modules. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-18mips: Break TBs after mfc0_countEdgar E. Iglesias
Break the TB after reading the count register. This makes it possible to take timer interrupts immediately after a read of a possibly expired timer. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-02softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()Peter Maydell
The softfloat functions float*_is_nan() were badly misnamed, because they return true only for quiet NaNs, not for all NaNs. Rename them to float*_is_quiet_nan() to more accurately reflect what they do. This change was produced by: perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan) (with the results manually checked.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-27target-mips: fix host CPU consumption when guest is idleAurelien Jarno
When the CPU is in wait state, do not wake-up if an interrupt can't be taken. This avoid host CPU running at 100% if a device (e.g. timer) has an interrupt line left enabled. Also factorize code to check if interrupts are enabled in cpu_mips_hw_interrupts_pending(). Based on a patch from Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-12-22target-mips: fix translation of MT instructionsNathan Froyd
The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of: int x; ... /* no initialization of x */ x = f (x); which confused later bits of TCG rather badly, leading to crashes. Fix the helpers to only return results (those instructions have no inputs), and fix the translation code accordingly. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-10-30target-xxx: Use fprintf_function (format checking)Stefan Weil
fprintf_function uses format checking with GCC_FMT_ATTR. Format errors were fixed in * target-i386/helper.c * target-mips/translate.c * target-ppc/translate.c Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-10-13mips: avoid write only variablesBlue Swirl
Compiling with GCC 4.6.0 20100925 produced a lot of warnings like: /src/qemu/target-mips/translate.c: In function 'gen_ld': /src/qemu/target-mips/translate.c:1039:17: error: variable 'opn' set but not used [-Werror=unused-but-set-variable] Fix by adding a dummy cast so that the variable is not unused. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-09-18MIPS: fix yield handlingBlue Swirl
The parameter for yield should be handled as a signed integer for the comparisons to have any effect. This also avoids a gcc warning with -Wtype-limits. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-08-06mips: Add support for VInt and VEIC irq modesEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2010-07-31Correctly identify multiple cpus in SMP systemsHervé Poussineau
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-31Remove unused constantHervé Poussineau
Remove unused constant MIPS_FCR0 Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno
Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of the interrupt logic to cpu-exec.c. Remove the remaining useless code and fix software interrupts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar@axis.com> Tested-by: Edgar E. Iglesias <edgar@axis.com>
2010-07-24mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias
When hw interrupt pending bits in CP0_Cause are set, the CPU should see the hw interrupt line as active. The CPU may or may not take the interrupt based on internal state (global irq mask etc) but the glue logic shouldn't care. This fixes MIPS external hw interrupts in combination with -icount. Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2010-07-17target-mips: fix xtlb exception for loongsonAurelien Jarno
Loongson 2E and 2F use the same entry for xtlb and tlb exception, at offset 0x000. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-11target-mips: add loongson 2E & 2F integer instructionsAurelien Jarno
This patch adds support for loongson 2E & 2F instructions. They are the same instructions, but differ by the opcode encoding. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-03remove exec-all.h inclusion from cpu.hPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03move cpu_pc_from_tb to target-*/exec.hPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-03remove unused stuff from */exec.hPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-01target-mips: add Loongson support prefetchAurelien Jarno
Loongson CPU uses a load to zero register for prefetch. Emulate it as a NOP. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-07-01target-mips: split load and storeAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-30target-mips: fix DINSU instructionAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-29target-mips: enable movn/movz on loongson 2E & 2FAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-29MIPS: Initial support of fulong mini pc (CPU definition)Huacai Chen
Signed-off-by: Huacai Chen <zltjiangshi@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09target-mips: Fix compilationStefan Weil
TCGv t1 needs tcg_temp_free instead of tcg_temp_free_i32. Cc: Nathan Froyd <froydnj@codesourcery.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09target-mips: add microMIPS exception handler supportNathan Froyd
Unlike MIPS16, microMIPS lets you choose the ISA mode for your exception handlers. The ISA mode is selectable via a user-writable CP0.Config3 flag. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09target-mips: microMIPS ASE supportNathan Froyd
Add instruction decoding for the microMIPS ASE. All we do is decode and then forward to the existing gen_* routines. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09target-mips: mips16 cleanupsNathan Froyd
Change code handling mips16-specific branches to use ISA-neutral special opcodes. Since there are several places where the delay slot requirements for microMIPS branches differ from mips16 branches, using opcodes is easier than checking hflags, then checking mips16 vs. microMIPS. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09target-mips: refactor c{, abs}.cond.fmt insnsNathan Froyd
Move all knowledge about coprocessor-checking and register numbering into the gen_cmp* helper functions. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-06-09target-mips: move FP FMT comments closer to the definitionsAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-22 18:44:27 +0000