| Age | Commit message (Expand) | Author |
|---|
| 2008-11-11 | target-mips: convert bit shuffle ops to TCG | aurel32 |
| 2008-11-11 | target-mips: convert bitfield ops to TCG | aurel32 |
| 2008-11-11 | target-mips: optimize gen_op_addr_add() (2/2) | aurel32 |
| 2008-11-11 | target-mips: optimize gen_op_addr_add() (1/2) | aurel32 |
| 2008-11-11 | target-mips: optimize gen_save_pc() | aurel32 |
| 2008-11-11 | target-mips: fix mft* helpers/call | aurel32 |
| 2008-11-11 | target-mips: fix temporary variable freeing in op_ldst_##insn() | aurel32 |
| 2008-11-04 | target-mips: use the new rotr/rotri instructions | aurel32 |
| 2008-10-06 | Show size for unassigned accesses (Robert Reif) | blueswir1 |
| 2008-09-22 | Use concet TCG instructions in the MIPS target. | ths |
| 2008-09-21 | Fix Xcontext fill, by Here Poussineau. | ths |
| 2008-09-21 | Add concat_i32_i64 op. | pbrook |
| 2008-09-18 | Use TCG registers for most CPU register accesses. | ths |
| 2008-09-18 | Move the active FPU registers into env again, and use more TCG registers | ths |
| 2008-09-14 | MIPS: Fix tlbwi/tlbwr | aurel32 |
| 2008-09-14 | MIPS: remove empty cpu_mips_irqctrl_init() | aurel32 |
| 2008-09-14 | target-mips: fix warning | aurel32 |
| 2008-09-05 | TCG fixes for target-mips | aurel32 |
| 2008-09-02 | Build fix for gcc-3.3. | ths |
| 2008-08-30 | Fix some warnings that would be generated by gcc -Wredundant-decls | blueswir1 |
| 2008-08-23 | MIPS: don't free TCG temporary variable twice | aurel32 |
| 2008-08-01 | Delete unused variable. | ths |
| 2008-07-23 | Use plain standard inline. | ths |
| 2008-07-23 | Less hardcoding of TARGET_USER_ONLY. | ths |
| 2008-07-21 | A bunch of minor code improvements in the MIPS target. | ths |
| 2008-07-21 | Fix logging output for MIPS HI, LO registers, by Stefan Weil. | ths |
| 2008-07-20 | Fix compiler warning, by Stefan Weil. | ths |
| 2008-07-20 | Simplify conditional FP moves. | ths |
| 2008-07-18 | Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. | ths |
| 2008-07-09 | Use temporary registers for the MIPS FPU emulation. | ths |
| 2008-07-05 | Fix typo in comment. | ths |
| 2008-07-05 | Change MIPS machine default to Malta. | ths |
| 2008-07-01 | Move interrupt_request and user_mode_only to common cpu state. | pbrook |
| 2008-07-01 | Static'ify some functions, and use standard inline in translate.c. | ths |
| 2008-07-01 | Delete duplicate code. | ths |
| 2008-06-30 | Spelling fixes, spotted by Stuart Brady. | ths |
| 2008-06-30 | Move CPU save/load registration to common code. | pbrook |
| 2008-06-30 | Make bcond and btarget TCG registers. | ths |
| 2008-06-29 | Remove unnecessary helper arguments, and fix some typos. | ths |
| 2008-06-29 | Add missing file. Fix spelling errors. | pbrook |
| 2008-06-29 | Add instruction counter. | pbrook |
| 2008-06-27 | Avoid unused input arguments which triggered tcg errors. Spotted by | ths |
| 2008-06-27 | More efficient target register / TC accesses. | ths |
| 2008-06-24 | Clarify some TODO items. | ths |
| 2008-06-24 | Remove remaining uses of T0 in the MIPS target. | ths |
| 2008-06-24 | T1 is now dead. | ths |
| 2008-06-24 | Reduce use of fixed registers a bit more. | ths |
| 2008-06-24 | Use temporaries instead of fixed registers for some instructions. | ths |
| 2008-06-23 | Pass T0/T1 explicitly to helper functions, and clean up a few dyngen | ths |
| 2008-06-20 | Delete obsolete file. | ths |
