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AgeCommit message (Expand)Author
2012-11-05target-mips: use ULL for 64 bit constantsBlue Swirl
2012-11-01Merge remote-tracking branch 'afaerber/qom-cpu' into stagingAnthony Liguori
2012-10-31target-mips: don't flush extra TLB on permissions upgradeAurelien Jarno
2012-10-31target-mips: fix TLBR wrt SEGMaskAurelien Jarno
2012-10-31target-mips: use deposit instead of hardcoded versionAurelien Jarno
2012-10-31target-mips: optimize ddiv/ddivu/div/divu with movcondAurelien Jarno
2012-10-31target-mips: implement movn/movz using movcondAurelien Jarno
2012-10-31target-mips: don't use local temps for store conditionalAurelien Jarno
2012-10-31target-mips: implement unaligned loads using TCGAurelien Jarno
2012-10-31target-mips: simplify load/store microMIPS helpersAurelien Jarno
2012-10-31target-mips: optimize load operationsAurelien Jarno
2012-10-31target-mips: cleanup load/store operationsAurelien Jarno
2012-10-31target-mips: restore CPU state after an FPU exceptionAurelien Jarno
2012-10-31target-mips: use softfloat constants when possibleAurelien Jarno
2012-10-31target-mips: cleanup float to int conversion helpersAurelien Jarno
2012-10-31target-mips: fix FPU exceptionsAurelien Jarno
2012-10-31target-mips: keep softfloat exception set to 0 between instructionsAurelien Jarno
2012-10-31target-mips: use the softfloat floatXX_muladd functionsAurelien Jarno
2012-10-31target-mips: do not save CPU state when using retranslationAurelien Jarno
2012-10-31target-mips: correctly restore btarget upon exceptionAurelien Jarno
2012-10-31target-mips: remove #if defined(TARGET_MIPS64) in opcode enumsAurelien Jarno
2012-10-31target-mips: Change TODO fileJia Liu
2012-10-31target-mips: Add ASE DSP processorsJia Liu
2012-10-31target-mips: Add ASE DSP accumulator instructionsJia Liu
2012-10-31target-mips: Add ASE DSP compare-pick instructionsJia Liu
2012-10-31target-mips: Add ASE DSP bit/manipulation instructionsJia Liu
2012-10-31target-mips: Add ASE DSP multiply instructionsJia Liu
2012-10-31target-mips: Add ASE DSP GPR-based shift instructionsJia Liu
2012-10-31target-mips: Add ASE DSP arithmetic instructionsJia Liu
2012-10-31target-mips: Add ASE DSP load instructionsJia Liu
2012-10-31target-mips: Add ASE DSP branch instructionsJia Liu
2012-10-31Use correct acc value to index cpu_HI/cpu_LO rather than using a fix numberJia Liu
2012-10-31target-mips: Add ASE DSP resources access checkJia Liu
2012-10-31target-mips: Add ASE DSP internal functionsJia Liu
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber
2012-10-28target-mips: Use TCG registers for the FPU.Richard Henderson
2012-10-28target-mips: rename helper flagsAurelien Jarno
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_sleep()Andreas Färber
2012-10-17target-mips: Pass MIPSCPU to mips_tc_sleep()Andreas Färber
2012-10-17target-mips: Pass MIPSCPU to mips_vpe_is_wfi()Andreas Färber
2012-10-17target-mips: Pass MIPSCPU to mips_tc_wake()Andreas Färber
2012-10-17target-mips: Clean up other_cpu in helper_{d,e}vpe()Andreas Färber
2012-09-27Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson
2012-09-19target-mips: Implement Loongson Multimedia InstructionsRichard Henderson
2012-09-19target-mips: Always evaluate debugging macro argumentsRichard Henderson
2012-09-19target-mips: Fix MIPS_DEBUG.Richard Henderson
2012-09-19target-mips: Set opn in gen_ldst_multiple.Richard Henderson
2012-09-15target-mips: switch to AREG0 free modeBlue Swirl
2012-09-08MIPS/user: Fix reset CPU state initializationMaciej W. Rozycki
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